February 1998 v.49 n.1

Cover: A reflective look at communications appliances used in the past contrasted with those used today

New Directions, by Steve Beitler, pg 2-3

Wireless Communications: A Spectrum of Opportunities. The tremendous growth in the consumer market for wireless communications products, such as celluar and cordless telephone, has created a parallel growth in research and development for higher-performance components for these products, by William J. McFarland, pg 6-9

[Author:] William J. McFarland, pg 6

The IrDA Standards for High-Speed Infrared Communications. As more data communications products, such as printers and laptop PCs, are released with infrared capability, support for a core set of IrDA standards has strong support from many manufacturers because, among other things, they want to ensure that their products will interoperate in a transparent and user-friendly manner, by Iain Millar, Martin Beale, Bryan J. Donoghue, Kirk W. Lindstrom, Stuart Williams, pg 10-25

Glossary, pg 11

[Authors:] Iain Millar, Kirk L. Lindstrom, Martin Beale, Stuart Williams, Bryan J. Donoghue, pg 26

RF Technology Trade-offs for Wireless Data Applications. Rapidly evolving wireless system standards and applications are placing demands on RF semiconductor manufacturers to produce highly specific and optimized RFIC solutions for specific growth segments including wireless data terminals, by Kevin J. Negus, Bryan T. Ingram, John D. Waters, and William J. McFarland, pg 27-36

[Authors:] Kevin J. Negus, Bryan T. Ingram, John D. Waters, pg 36

0.1-mm Gate-Length AlInAs/GaInAs/GaAs MODFET MMIC Process for Applications in High-Speed Wireless Communications. To ensure high performance of MODFETs used in HP’s high-speed communications applications, their high-frequency signal, noise, and power characteristics must be optimized, by Hans Rohdin, Avelina Nagy, Virginia Robbins, Chung-Yi Su, Arlene S. Wakita, Judith Seeger, Tony Hwang, Patrick Chye, Paul E. Gregory, Sandeep R. Bahl, Forrest G. Kellert, Lawrence G. Studebaker, Donald C. D’Avanzo, Sigurd Johnsen, pg 37-38. This complete article can be found at: http://www.hp.com/hpj/98feb/feb98a4.htm [sic; url no longer functions].

An Enhancement-Mode PHEMT for Single-Supply Power Amplifiers. To address the growing handset power amplifier needs for the emerging Personal Communications Services (PCS) markets, a 3-volt, single-supply, enhancement-mode pseudomorphic high-electron-mobility transistor (E-PHEMT) has been developed. The device exhibits +33-dBm output power and 65% drain efficiency at 1.88 GHz, by Der-Woei Wu, John S. Wei, Chung-Yi Su, Ray M. Parkhurst, Shyh-Liang Fu, Shih-Shun Chang, Richard B. Levitsky, pg 39-51

[Authors:] Der-Woei [Dave] Wu, Ray M. Parkhurst, Shyh-Liang Fu, John S. Wei, Shih-Shun [Mark] Chang, Chung-Yi Su, Richard [Rich] B. Levitsky, pg 51

Direct Broadcast Satellite Applications. One of the main reasons for the popularity of direct broadcast satellite (DBS) service is the small size of the parabolic dish antenna. The key to the small-size dish is a low-noise GaAs transistor used in the low-noise block of the DBS receiver system. One of HP’s efforts in this area has been to develop an AllnAs/GaInAs device fabricated on a conventional GaAs substrate that has a lower noise figure, higher gain, and lower cost, by Shunichiro Yajima, Antoni C. Niedzwiecki, pg 52-55

[Authors:] Shunichiro [Shun] Yajima, Antoni [Tony] C. Niedzwiecki, pg 52

Packaging, pg 55

Pager Testing with a Specially Equipped Signal Generator. This paper reviews current trends in the paging industry, describes typical pager designs, presents the test requirements of modern pagers, and discusses the contribution to pager testing of the HP 8648A signal generator with Option 1EP, the paper signaling option, by Matthew W. Bellis, pg 56-65

[Author:] Matthew [Matt] W. Bellis, pg 56

HP CaLan: A Cable System Tester that is Accurate Even in the Presence of Ingress. Today, cable system operators have to deal with bidirectional traffic from sources such as pay-per-view television, high-speed Internet access, and two-way telephony. A cable testing system is described that can handle bidirectional traffic even with RF noise (ingress) on the return path, by Daniel D. Van Winkle, pg 66-83

[Author:] Daniel [Dan] D. Van Winkle, pg 66

Glossary, pg 68

May 1998 v.49 n.2

Cover: Examples of 3D graphics images that can be rendered with HP workstations using the VISUALIZE fx graphics hardware.

Highlights, by C. L. Leath, pg 2-3

An API for Interfacing Interactive 3D Applications to High-Speed Graphics Hardware. The OpenGLÒ specification defines a software interface that can be implemented on a wide range of graphics devices ranging from simple frame buffers to fully hardware-accelerated geometry processors, by Kevin T. Lefebvre, John M. Brown, pg 6-8

[Authors:]  Kevin T. Lefebvre, John M. Brown, pg 6

The Fast-Break Program, pg 8

An Overview of the HP OpenGLÒ Software Architecture. OpenGL is a hardware-independent specification of a 3D graphics programming interface. This specification has been implemented on many different vendors’ platforms with different CPU types and graphics hardware, ranging from PC-based board solutions to high-performance workstations, by Kevin J. Lefebvre, Robert J. Casey, Michael J. Phelps, Courtney D. Goeltzenleuchter, Donley B. Hoffman, pg 9-18

[Authors:] Michael J. Phelps, Courtney D. Goeltzenleuchter, Donley B. Hoffman, pg 18

The DirectModel Toolkit: Meeting the 3D Graphics Needs of Technical Applications. The increasing use of 3D modeling for highly complex mechanical designs has led to a demand for systems that can provide smooth interactivity with 3D models containing millions or even billions of polygons, by Brian E. Cripe, Thomas A. Gaskins, pg 19-27

[Authors:] Brian E. Cripe, Thomas A. Gaskins, pg 19

Fahrenheit, pg 21

An Overview of the VISUALIZE fx Graphics Accelerator Hardware. Three graphics accelerator products with different levels of performance are based on varying combinations of five custom integrated circuits. In addition, these products are the first ones from Hewlett-Packard to provide native acceleration for the OpenGLÒ API, by Noel D. Scott, Daniel M. Olsen, Ethan W. Gannett, pg 28-34

Occlusion Culling, pg 30

Fast Virtual Texturing, pg 32-33

[Authors:] Noel D. Scott, Daniel M. Olsen, Ethan W. Gannett, pg 34

HP Kayak: A PC Workstation with Advanced Graphics Performance. World-leading 3D graphics performance, normally only found in a UNIXÒ workstation, is provided in a PC workstation platform running the Windows NTÒ operating system. This system was put together with a time to market of less than one year from project initiation to shipment, by Ross A. Cunniff, pg 35-40. VISUALIZE.

[Author:] Ross A. Cunniff, pg 35

Concurrent Engineering in OpenGLÒ Product Development. Time to market was reduced when tasks that had been traditionally serialized were completed in parallel, by Robert J. Casey, L. Leonard Lindstone, pg 41-45

[Authors:] Robert J. Casey, L. Leonard Lindstone, pg 41

Advance Display Technologies on HP-UX Workstations. Multiple monitors can be configured as a contiguous viewing space to provide more screen space so that users can see most, if not all, of their applications without any special window manipulations, by Todd M. Spencer, Paul M. Anderson, David Sweetser, pg 46-49

[Authors:] Todd M. Spencer, Paul M. Anderson, David J. Sweetser, pg 50

Delivering PCI in HP B-Class and C-Class Workstations: A Case Study in the Challenges of Interfacing with Industry Standards. In the highly competitive workstation market, customers demand a wide range of cost-effective, high-performance I/O solutions. An industry-standard I/O subsystem allows HP workstations to support the latest I/O technology, by Ric L. Lewis, Erin A. Handgen, Nicholas J. Ingegneri, Glen T. Robinson, pg 51-60

[Authors:]  Ric L. Lewis, Nicholas J. Ingegneri, Erin A. Handgen, Glen T. Robinson, pg 61

Linking Enterprise Business Systems to the Factory Floor. Information is the fuel that drives today’s business enterprises. The ability to link different components in the enterprise together in a user-friendly and transparent manner increases the effectiveness of companies involved in manufacturing and production, by Kenn S. Jennyc, pg 62-73

[Author:] Kenn S. Jennyc, pg 62

Knowledge Harvesting, Articulation, and Delivery. Harnessing expert knowledge and automating this knowledge to help solve problems have been the goals of researchers and software practitioners since the early days of artificial intelligence. A tool is described that offers a semiautomated way for software support personnel to use the vast knowledge and experience of experts to provide support to customers, by Kemal A. Delic, Dominique Lahaix, pg 74-81

[Authors:] Kemal A. Delic, Dominique Lahaix, pg 74

Glossary, pg 76

A Theoretical Derivation of Relationships between Forecast Errors. This paper studies errors in forecasting the demand for a component used by several products. Because data for the component demand (both actual demand and forecast demand) at the aggregate product level is easier to obtain than at the individual product level, the study focuses on the theoretical relationships between forecast errors at these two levels, by Jerry Z. Shan, pg 82-88

[Author:] Jerry Z. Shan, pg 82

Strengthening Software Quality Assurance. Increasing time-to-market pressures in recent years have resulted in a deterioration of the quality of software entering the system test phase. At HP’s Kobe Instrument Division, the software quality assurance process was reengineered to ensure that released software is as defect-free as possible, by Mutsuhiko Asada, Pong Mang Yan, pg 89-97

[Authors:] Mutsuhiko Asada, Pong Mang Yan, pg 89

A Compiler for HP VEE. With the addition of a compiler, HP VEE programs can now benefit from improved execution speed and still provide the advantage of an interactive interpreter, by Steven Greenbaum, Stanley Jefferson, pg 98-99. Visual Engineering Environment. This complete article can be found at: http://www.hp.com/hpj/98may/ma98a13.htm [sic; url no longer functions].

[Authors:] Steven [Steve] Greenbaum, Stanley Jefferson, pg 98

August 1998 v.49 n.3109

Highlights, by C. L. Leath, pg 2-3

Cover: The 150-MHz-bandwidth membrane hydrophone is described. The signal is generated by a 20-MHz focused ultrasound transducer driving water into a non-linear state.

A 150-MHz-Bandwidth Membrane Hydrophone for Acoustic Field Characterization. To measure the beam parameters of intravascular ultrasound imaging transducers with operating center frequencies exceeding 20 MHz and beamwidths below 200 mm, a hydrophone with a spot diameter less than 50 mm and a bandwidth greater than 150 MHz is required. The hydrophone described in this article is a step towards meeting these requirements, by Paul Lum, Michael Greenstein, Edward D. Verdonk, Charles Grossman, Jr., Thomas L. Szabo, pg 6-15

The Hewlett-Packard Medical Products Group Acoustic Output Measurement Laboratory, by Charles Grossman, J., Thomas L. Szabo, Kathleen Meschisen, Katharine Stohlman, pg 8

[Authors:] Paul Lum, Charles [Charlie] Grossman, Jr., Michael Greenstein, Thomas [Tom] L. Szabo, Edward [Ed] D. Verdonk, pg 16

Units, Traceability, and Calibration of Optical Instruments. This article presents a short and comprehensive overview of the art of units measurement and calibration. Although the examples focus on optical instruments, the article may be of interest to anyone interested in metrology, by Andreas Gerster, pg 17-29

[Author:] Andreas Gerster, pg 17

Appendix: Realization of Electrical Units,  pg 28-29

Techniques for Higher-Performance Boolean Equivalence Verification. The techniques and algorithms presented in this paper are a result of six years’ experience in researching, developing, and integrating Boolean equivalence verification into the HP Convex Division’s ASIC design flow. We have discovered that a high-performance equivalence checker is attainable through careful memory management, the use of bus grouping techniques during the RTL-to-equation translation process, hierarchical to flat name mapping considerations, subequivalence point cone partitioning, solving the false negative verification problem, and building minimal binary decision diagrams, by Harry D. Foster, pg 30-38. Register Transfer Language.

[Author:] Harry D. Foster, pg 30

On-Chip Cross Talk Noise Model for Deep-Submicrometer ULSI Interconnect. A simple closed-form model for calculating cross talk noise on signal lines in deep-submicrometer interconnect systems has accuracy comparable to SPICE for an arbitrary ramp input rate. Interconnect resistance, interconnect capacitance, and driver resistance are all taken into account. The model is suitable for rapid cross talk estimation and signal integrity verification, by Samuel O. Nakagawa, Dennis M. Sylvester, John G. McBride, Soo-Young Oh, pg 39-44

[Authors:] Samuel [Sam] O. Nakagawa, John G. McBride, Dennis M. Sylvester, Soo-Young Oh, pg 45

Theory and Design of CMOS HSTL I/O Pads. To control reflections, the impedance of integrated circuit output pad drivers must be matched to the impedance of the transmission lines to which the pads are connected. HP’s HSTL (high-speed transceiver logic) controlled impedance I/O pads use an on-chip impedance matching network that compensates for process, voltage, and temperature (PVT) variations, by Gerald L. Esch, Jr., Robert B. Manley, pg 46-52

[Authors:] Gerald [Jerry] L. Esch, Jr., Robert [Bob] B. Manley, pg 46

A Low-Cost RF Multichip Module Packaging Family. These packages provide much lower cost than traditional high-frequency packaging, shielding, and interconnects, while still providing low-reflection transitions and high electrical isolation, by Lewis R. Dove, Martin L. Guth, Dean B. Nicholson, pg 53-59. MIPPS.

[Authors:] Lewis [Lew] R. Dove, Martin L. Guth, Dean B. Nicholson, pg 60

Testing with the HP 9490 Mixed-Signal LSI Tester. The tester’s features include a timing interval analyzer for statistical analysis of clock periods, synchronous generation of arbitrary waveforms with respect to master digital clocks, and a library of digital signal processing routines. These features have been applied to production measurements of key parameters like AGC loop bandwidth, phase-locked loop timing jitter, and ADC signal-to-noise ratio and distortion parameters, by Matthew M. Borg, Kalwant Singh, pg 61-70

[Authors:] Matthew [Matt] M. Borg, Kalwant Singh, pg 61

Tester Description, pg 66

Reliability Enhancement of Surface Mount Light-Emitting Diodes for Automotive Applications. Preencapsulation drying eliminates broken stitch bonds and reduces inconsistent reliability performance. A new casting epoxy formulation stops epoxy cracking, and optimization of the die-attach epoxy cure schedule solves lifted die-attach and delamanation problems, by Koay Ban-Kuan, Leong Ak-Wing, Tan Boon-Chun, Yoong Tze-Kwan, pg 71-80

[Authors:] Koay Ban-Kuan, Yoong Tze-Kwan, Keong Ak-Wing, Tan Boon-Chun, pg 80

Engineering Surfaces in Ceramic Pin Grid Array Packaging to Inhibit Epoxy Bleeding. Bleeding of epoxy resin around surfaces undergoing bonding during electronic packaging assembly has long caused sporadic yield loss. Previously, it was thought that vacuum baking reduced the yield loss resulting from surface contaminants. Although vacuum baking inhibits epoxy resin bleeding, it also produces coatings of hydrocarbons, which affect surface wettability and surface energy. Surfactant coating results in a surface chemistry similar to vacuum-baked substrates but it a better alternative because of its controllability, by Ningxia Tan, Kenneth H. H. Lim, Bernard Chin, Anthony J. Bourdillon, pg 81-89. CPGA.

Glossary, pg 83

[Authors:] Ningzia Tan, Kenneth H. H. Lim, Bernard Chin, Anthony J. Bourdillon, pg 90

November 1998 v.50 n.1

Highlights, by C. L. Leath, pg 2-3

Cover: The lower-left pictures shows the SnapLED emitters that are attached to a clinch frame to make up the fully assembled SnapLED array shown in the upper-right picture. The other pictures show two more configurations of fully assembled SnapLED arrays

Dear Reader,

Over the last few years the World Wide Web has become ubiquitous, and more and more people are accessing information on the web. Consequently, the Hewlett-Packard Journal will no longer be distributed in print form. November’s issue is available on our website: http://www.hp.com/hpj/journal.html [sic; url no longer functions], pg 4

February 1997 v.48 n.1

Cover: The neonatal version of a family of sensors used for monitoring oxygen saturation levels in a patient’s blood

SoftBench 5.0: The Evolution of an Integrated Software Development Environment. The vision and objectives of the original SoftBench product have enabled it to continue to be a leader in the integrated software development market. For example, since SoftBench 1.0 over 80 third-party software tools have been integrated with SoftBench, by Deborah A. Lienhart, pg 6-11

Applying a Process Improvement Model to SoftBench 5.0, by Deborah A. Lienhart, Scott Jordan, pg 8-9

The C++ SoftBench Class Editor. The C++ SoftBench class editor adds automatic code generation capabilities to the class graph of the SoftBench static analyzer. Novice C++ programmers can concentrate on their software designs and have the computer handle C++’s esoteric syntax. Experienced C++ programmers benefit from smart batch editing functionality and by having the computer quickly generate the program skeleton, by Julie B. Wilson, pg 12-15

The SoftBench Static Analysis Database. The static analysis database supports the SoftBench static analyzer and the C++, C, FORTRAN, Pascal, and Ada programming languages. The underlying data is isolated by a complier interface and a tool interface, by Robert C. Bethke, pg 16-18

CodeAdvisor: Rule-Based C++ Defect Detection Using a Static Database. C++ SoftBench CodeAdvisor is an automated error detection tool for the C++ language. It uses detailed semantic information available in the SoftBench static database to detect high-level problems not typically found by compliers. This paper describes CodeAdvisor and identifies the advantages of static over run-time error checking, by Timothy J. Duesing, John R. Diamant, pg 19-21

Using SoftBench to Integrate Heterogeneous Software Development Environments. Migrating from mainframe-based computing to client/server-based computing can result in a heterogeneous collection of machines that do not interoperate, forcing software developers to deal with unfamiliar system commands and systems that cannot share data. A SoftBench control daemon is described that enables developers to integrate heterogeneous computing systems into efficient, tightly coupled software development environments with consistent, easy-to-use graphical user interfaces across all machines, by Stephen A. Williams, pg 22-27

The Supply Chain Approach to Planning and Procurement Management. The supply chain approach models stochastic events influencing a manufacturing organization’s shipment and inventory performance in the same way that a mechanical engineer models tolerance buildup in a new product design. The objectives are to minimize on-hand inventory and optimize supplier response time, by Gregory A. Kruger, pg 28-34. SRT.

Appendix I: Derivation of the Standard Deviation of Demand Given an R-Week Review Period, pg 34

Appendix II: The Expected Value and Variance of On-Hand Inventory when there Are no Restrictions on Minimum Buy Quantities, pg 34

Appendix III: The Expected Value and Variance of On-Hand Inventory when there Are Restrictions on Minimum Buy Quantities, pg 35

Appendix IV: Incorporating SRT (Supplier Response Time) into the Safety Stock Calculations, pg 36-37

Appendix V: Derating the Service Level to Account for Reduced Periods of Exposure to Stock-outs as a Result of Minimum Buy or Economic Order Quantities, pg 37

Appendix VI: Estimating Weekly Demand Uncertainty from Monthly Data, pg 38

Appendix VII: Adjusting Safety Stock to Account for Yield Loss, pg 38

A New Family of Sensors for Pulse Oximetry. This new family of reusable sensors for noninvasive arterial oxygen saturation measurements is designed to cover all application areas. It consists of four sensors: adult, pediatric, neonatal, and ear clip, by Dietmar Miller, Siegfried Kastle, Friedemann Noller, Siegfried Falk, Anton Bukta, Eberhard Mayer, pg 39-53. M1191A, M1192A, M1193A, M1194A.

Volunteer Study for Sensor Calibration, pg 48-49

Neonatal Sensor Clinical Validation, pg 52

Design of a 600-Pixel-per-Inch, 30-Bit Color Scanner. Simply sampling an image at higher resolution will not give the results a customer expects. Other optical parameters such as image sharpness, signal-to-noise ratio, and dark voltage correction must improve to see the benefits of 600 pixels per inch, by Steven L. Webb, Kevin J. Youngers, Michael J. Steinle, Joe A. Eccher, pg 54-61. ScanJet 3c/4c.

Sing to Me, pg 59

Building Evolvable Systems: The ORBlite Project. One critical requirement that HP has learned over the years from building large systems is the need for the system and its components to be able to evolve over time. A distributed object communication framework is described that supports piecewise evolution of components, interfaces, communication protocols, and APIs and the integration of legacy components, by Keith E. Moore, Evan R. Kirshenbaum, pg 62-72

Developing Fusion Objects for Instruments. The successful application of object-oriented technology to real-world problems in a nontrival task. This is particularly true for developers transitioning from nonobject-oriented methods to object-oriented methods. Key factors that improve the probability of success in applying object-oriented methods are selecting an object-oriented method, developing a process definition and continually improving the process, by Antonio A. Dicolen, Jerry J. Liu, pg 73-85

An Approach to Architecting Enterprise Solutions. A frequently mentioned ailment in healthcare information management is the lack of compatibility among information systems. To address this problem, HP’s Medical Products Group has created a high-level model that defines the major architectural elements required for a complete healthcare enterprise information system, by Robert A. Seliger, pg 86-95. MPG.

Components and Objects, pg 88

The Andover Working Group, pg 89

Multiple Interfaces in COM, pg 91

Object-Oriented Customer Education. As customers require more trusted advice to solve their business problems, the choice of education solutions has become a strategic issue that often precedes and directs the choice of technologies, by Wulf Rehder, pg 96-102

Questions about Using Objects, pg 98

Starting an Object-Oriented Project, by Ramesh Balasubramanian, pg 100

Authors February 1997: Deborah [Debbie] A. Lienhart, Julie B. Wilson, Robert [Bob] C. Bethke, Timothy [Tim] J. Duesing, John R. Diamant, Stephen [Steve] A. Williams, Gregory [Greg] A. Kruger, Siegfried Kastle, Friedemann Noller, Siegfried Falk, Anton [Toni] Bukta, Eberhard Mayer, Dietmar Miller, Steven [Steve] L. Webb, Kevin J. Youngers, Michael [Mike] J. Steinle, Joe A. Eccher, Keith E. Moore, Evan R. Kirshenbaum, Antonio [Tony] A. Dicolen, Jerry J. Liu, Rob Seliger, Wulf Rehder, pg 103-106

April 1997 v.48 n.2

Cover: Successively zoomed views of the analog startup waveform of a circuit, captured by the HP 54645D mixed-signal oscilloscope triggering on digital data

A Family of Instruments for Testing Mixed-Signal Circuits and Systems. This entirely new product category combines elements of oscilloscopes and logic analyzers, but unlike previous combination products, these are “oscilloscope first” and logic analysis is the add-on, by Robert A. Witte, pg 6-9. 54645A, 54645D.

Mixed-Signal Microcontroller, by Weis Reid, pg 8

Testing a Mixed-Signal Design Based on a Single-Chip Microcontroller. The HP 54645D mixed-signal oscilloscope simplifies the testing and debugging of microcontroller-based mixed-signal designs with its integrated analog and digital channels, by Jerald B. Murphy, pg 10-12

Design of a Mixed-Signal Oscilloscope. This combination of a digital oscilloscope and a logic timing analyzer provides powerful cross-domain triggering capabilities for capturing signals in mixed-signal environments. MegaZoom technology, consisting of advanced acquisition techniques and dedicated signal processing, maintains display responsiveness while making optimal use of deep sample memory, by Matthew S. Holcomb, Stuart O. Hall, Warren S. Tustin, Patrick J. Burkart, Steven D. Roach, pg 13-22. 54645A/D.

A Cost-Effective Architecture for a 500-MHz Counter for Glitch Trigger, by Steven D. Roach, pg 22

Sustained Sample Rate in Digital Oscilloscopes. At all but a few of the fastest sweep speeds, the acquisition memory depth and not the maximum sample rate determines the oscilloscope’s actual sample rate. Peak detection capability, when used correctly, can make up for acquisition memory shortfalls, by Steven B. Warntjes, pg 23-25

Acquisition Clock Dithering in a Digital Oscilloscope. When a frequency component of the input signal is greater than half the sample rate, aliening can occur. When the oscilloscope is equivalent time sampling, signals that are subharmonics of the sample clock will be poorly displayed. In the HP 54645A/D oscilloscopes, these effects are greatly reduced by dithering the sample clock during and between acquisitions, by Derek E. Toeppen, pg 26-28

An Oscilloscope-Like Logic Timing Analyzer. Market research indicated that some customers doing embedded development preferred to work with oscilloscopes instead of standard logic analyzers. The HP 54620 logic timing analyzer offers many oscilloscope features, including direct-access controls, a highly interactive display, computed measurements, delayed sweep, simplified triggering, and a trace labelmaker, by Steven B. Warntjes, pg 29-33

Oscilloscope/Logic Timing Analyzer Synergy, pg 31

High-Sample-Rate Multiprocessor-Based Oscilloscopes. The HP 54615B and 54616B oscilloscopes blend proprietary high-speed sampling technology with the power of digital signal processing and a proven user interface to deliver usable advanced characterization capability, by R. Scott Brunton, pg 34-36

A Dielectric Spectrometer for Liquid Using the Electromagnetic Induction Method. Key parameters of colloids are often directly related to or can be derived from permittivity or conductivity. Dielectric dispersion analysis (dielectric spectroscopy) yields insights into colloidal properties. A dielectric meter using a new sensing technique has been developed, by Hideki Wakamatsu, pg 37-44. E5050A.

Emulating ATM Network Impairments in the Laboratory. This article discusses a new product for the HP Broadband Series Test System. The HP E4219 ATM network impairment emulator allows telecommunication network and equipment manufacturers to emulate an Asynchronous Transfer Mode network in the laboratory, by Robert W. Dmitroca, Susan G. Gibson, Trevor R. Hill, Luisa Mola Morales, Chong Tean Ong, pg 45-50

A Message Handling System for B-ISDN User-Network Interface Signaling Test Software. B-ISDN user-network interface signaling has many different protocol variants and each of them has tens of different types of messages. The message handling system provides a powerful tool for the developer to easily support these variants and messages in the HP Broadband Series Test System (BSTS), by Satoshi Naganawa, Richard Z. Zuo, pg 51-58

Object-Oriented Network Management Development. As networks continue to proliferate, the need to develop and deploy network management applications has become a critical issue. Two software development tools are described that allow developers to create powerful network management-side applications quickly without necessarily having to be experts on network protocols, by Peter E. Mellquist, Thomas Murray, pg 59-65. SNMP++, SNMPGen, Simple Network Management Protocol.

SNMP,  pg 60

Design of an Enhanced Vector Network Analyzer. A liquid crystal display (LCD) reduces size and weight and has a larger viewing area. TRL (Thru-Reflect-Line) calibration allows measurement of components that do not have coaxial connectors. New software algorithms achieve faster acquisition and frequency tuning of the synthesized source to give faster updates of the measurement data, by Barry A. Brown, Stanley E. Jaffe, Frank K. David, Frederic W. Woodhull II, Richard R. Barg, Joel P. Dunsmore, Douglas C. Bender, pg 66-77. 8720.

Modeling Source Match Effects for Microwave Power Splitter Design, by Joel P. Dunsmore, pg 72-73

Optimization of Interconnect Geometry for High-Performance Microprocessors. The goals of the work presented in this paper were to estimate quantitatively the impact of interconnect technology parameters on the performance of high-end microprocessors and to use this information to optimize the interconnect geometry within the constraints imposed by the process. The 64-bit PA 8000 microprocessor was used as a test case, by Khalid Rahmat, Soo-Young Oh, pg 78-83

Designing, Simulating, and Testing and Analog Phase-Locked Loop in a Digital Environment. In designing a phase-locked loop for use on several HP ASICs, the digital portion of an existing phase-locked loop was transferred to a behavioral VHDL description and synthesized. A behavioral model was written for the analog section to allow the ASIC designers to run system simulations. A new leakage test was developed that has been very effective in screening out process defects in the filter of the original design, by Thomas J. Thatcher, Michael M. Oshima, Cindy Botelho, pg 84-88

Analog Behavioral Modeling and Mixed-Mode Simulation with SABER and Verilog. A description is given of specific analog behavioral modeling and mixed-mode simulation techniques using SABER and Verilog. Full-channel simulations have been carried out on a class I partial response maximum likelihood (PRML) read/write channel chip. Complex analog circuits such as an adaptive feed-forward equalizer, an automatic gain control block, and a phase-locked loop are modeled in detail with SABER MAST mixed-signal behavioral modeling language. A simulation speedup of two orders of magnitude has been achieved compared to SPICE, by Ben B. Sheng, Hugh S. C. Wallace, James S. Ignowski, pg 89-94

Physical Design of 0.35-mm Gate Arrays for Symmetric Multiprocessing Servers. To meet gate density and system performance requirements for the HP Exemplar S-class and X-class technical servers, a physical design methodology was developed for 1.1-million-raw-basic-cell, 0.35-mm CMOS gate arrays. Commercial and ASIC vendor-supplied tools were augmented with internally developed tools to put together a highly optimized physical chip design process, by Lionel C. Bening, Tony M. Brewer, Harry D. Foster, Jeffrey S. Quigley, Robert A. Sussman, Paul F. Vogel, Aaron W. Wells, pg 95-103

Fast Turnaround of a Structured Custom IC Design Using Advanced Design Tools and Methodology. Through the use of several new tools and methodologies, a small team of engineers was able to design and verify a 1.7-million-FET chip in eight months. The tools and methodologies used included a set of guidelines and timing constraints that were met by the customer, a data path compiler, a highly tuned custom multiplier cell that was used in 87 locations, and an automated top-level power connection scheme, by Rory L. Fisher, Stephen R. Herbener, John R. Morgan, John R. Pessetto, pg 104-107. IMACC.

Authors April 1997: Robert [Bob] A. Witte, Jerald [Jerry] B. Murphy, Matthew [Matt] S. Holcomb, Stuart [Stu] O. Hall, Warren S. Tustin, Patrick J. Burkart, Steven [Steve] D. Roach, Steven [Steve] B. Warntjes, Derek E. Toeppen, R. Scott Brunton, Hideki Wakamatsu, Robert W. Dmitroca, Susan G. Gibson, Trevor R. Hill, Luisa Mola Morales, Chong Tean Ong, Satoshi Naganawa, Richard Z. Zuo, Peter E. Mellquist, Thomas [Tom] Murray, Frank K. David, Frederic [Fred] Woodhull II, Richard [Dick] R. Barg, Joel P. Dunsmore, Douglas [Doug] C. Bender, Barry A. Brown, Stanley [Stan] E. Jaffe, Khalid Rahmat, Soo-Young Oh, Thomas [Tom] J. Thatcher, Michael [Mike] M. Oshima, Cindy Botelho, Hugh S. C. Wallace, James [Jim] S. Ignowski, Lionel C. Bening, Tony M. Brewer, Harry D. Foster, Jeffrey [Jeff] S. Quigley, Robert [Bob] A. Sussman, Paul F. Vogel, Aaron W. Wells, Rory L. Fisher, Stephen [Steve] R. Herbener, John R. Morgan, John R. Pessetto, pg 107-112

June 1997 v.48 n.3

Cover: An artistic rendition of the change in the printing model brought on by the Printing Performance Architecture (PPA) implemented in the HP DeskJet 820C. The top figure depicts printing before the PPA where most of the printing logic resides in the printer. The lower figure depicts printing after the PPA where most of the printing logic resides in the host computer.

A Lower-Cost Inkjet Printer Based on a New Printing Performance Architecture. The HP DeskJet 820C printer is the first HP inkjet printer in an evolutionary product plan that takes advantage of computer and operating systems trends to make inkjet printing affordable for more users. The printer’s integrated software, firmware, and digital electronics architecture uses the computational resources in the PC instead of duplicating these resources in the printer, by David J. Shelley, James T. Majewski, Mark R. Thackray, John L. McWilliams, pg 6-11

PPA Printer Software Driver Design. The software driver for the HP DeskJet 820C printer performs many functions that were formerly performed in the printer, including swath cutting, data formatting, and communications. The driver also includes a PCL emulation module for DOS application support, by David M. Hall, Lee W. Jackson, Katrina Heiles, Karen E. Van der Veer, Thomas J. Halpenny, pg 12-21. Printing Performance Architecture.

PPA Printer Firmware Design. Hewlett-Packard’s new Printing Performance Architecture (PPA) includes a significantly reduced set of printer firmware. “Don’t touch the dots” was the firmware designer’s golden rule. This means that the firmware and processor do only mechanism control, I/O, command parsing, status reporting, user interface, and general housekeeping functions, by Erik Kilk, pg 22-30. DeskJet 820C.

PPA Printer Controller ASIC Development. As the first Printing Performance Architecture printer, the HP DeskJet 820C needed a completely new digital controller ASIC design. The chip’s architecture was optimized for the specific requirements of PPA. Concurrent development of hardware and firmware through the use of hardware emulators and attention to regulatory issues during the design helped the product meet all of its requirements on schedule, by John L. McWilliams, Leann M. MacMillan, Bimal Patak, Harlan A. Talley, pg 31-37

Next Generation Inkjet Printhead Drive Electronics. By integrating the functions of four ICs into one new custom IC and then moving all the electronics related to the pens up to the carriage with the pens, significant savings were realized. A simple, low-contact-count, inexpensive flexible cable is used to connect the carriage to the main printed circuit assembly, by Huston W. Rice, pg 38-42. DeskJet 850C.

The PA 7300LC Microprocessor: A Highly Integrated System on a Chip. A collection of design objectives targeted for low-end systems and the legacy of an earlier microprocessor, which was designed for high-volume cost-sensitive products, guided the development of the PA 7300LC processor, by Terry W. Blanchard, Paul G. Tobin, pg 43-47

Configurability of the PA 7300LC, pg 45

Functional Design of the HP PA 7300LC Processor. Microarchitecture design, with attention to optimizing specific areas of the CPU and memory and I/O subsystems, is key to meeting the cost and performance goals of a processor targeted for midrange and low-end computer systems, by Leith Johnson, Stephen R. Undy, pg 48-60

Timing Flexibility, pg 53

High-Performance Processor Design Guided by System Costs. To minimize time to market and keep costs low, the PA 7300LC design was leveraged from a previous CPU, the chip area was reduced, cache RAM arrays with redundancy were added, and high-speed, high-coverage scan testing was added to reduce manufacturing costs, by David C. Kubicek, Thomas J. Sullivan, Amitabh Mehra, John G. McBride, pg 61-68

Verifying the Correctness of the PA 7300LC Processor. Functional verification was divided into presilicon and postsilicon phases. Software models were used in the presilicon phase, and fabricated chips and real systems were used in the postsilicon phase. In both phases the goals were the same – to find design bugs and ensure that customers get the highest quality part possible, by Paul G. Tobin, Duncan Weir, pg 69-72

Random Code Generation, pg 71

An Entry-Level Server with Multiple Performance Points. To address the very intense, high-volume environment of departmental and branch computing, the system design for the D-class server was made flexible enough to offer many price and performance features at its introduction and still allow new features and upgrades to be added quickly, by Lin A. Nease, Kirk M. Bresniker, Charles J. Zacky, Michael J. Greenside, Alisa Sandoval, pg 73-81. HP 9000 Series 800.

A Low-Cost Workstation with Enhanced Performance and I/O Capabilities. Various entities involved in product development came together at different times to solve a design problem, evaluate costs, and make adjustments to their own projects to accommodate the cost and performance goals of the low-cost HP 9000 B-class workstation, by Scott P. Allan, Bruce P. Bergmann, Ronald P. Dean, Dianne Jiang, Dennis L. Floyd, pg 82-88

Testing Safety-Critical Software. Testing safety-critical software differs from conventional testing in that the test design approach must consider the defined and implied safety of the software at a level as high as the functionality to be tested, and the test software has to be developed and validated using the same quality assurance processes as the software itself, by Evangelos Nikolaropoulos, pg 89-94 OmniCare.

Another Approach to Testing: Inspections, pg 92

A High-Level Programming Language for Testing Complex Safety-Critical Systems. Dealing with an enormous amount of data is characteristic of validating complex and safety-critical software systems. ATP, a high-level programming language, supports the validation process. In a patient monitor test environment it has shown its usefulness and power by enabling a dramatic increase in productivity. Its universal character allows it to migrate validation scenarios to different products based on other architectural paradigms, by Andreas Pirrung, pg 95-102

Structural Testing, Random Testing, and Statistical Structural Testing,  pg 97

An Automated Test Evaluation Tool. The AutoCheck program fully automates the evaluation of test protocol files for medical patient monitors. The AutoCheck output documents that the evaluation has been carried out and presents the results of the evaluation, by Jorg Schwering, pg 103-108. AutoTest.

Effective Testing of Localized Software. Testing localized software is a complex and time-consuming task. With the help of the testing tools developed for HP patient monitors, local language validation for these products is fully automated, by Evangelos Nikolaropoulos, Jorg Schwering, Andreas Pirrung, pg 109-111

Authors June 1997, David [Dave] J. Shelley, James Majewski, Mark R. Thackray, David M. Hall, Lee W. Jackson, Katrina Heiles, Karen E. Van der Veer, Thomas [Tom] J. Halpenny, Erik Kilk, John L. McWilliams, Leann M. MacMillan, Bimal Pathak, Harlan A. Talley, Huston [Hugh] W. Rice, Terry W. Blanchard, Paul G. Tobin, Leith Johnson, Stephen [Steve] R. Undy, David C. Kubicek, Thomas [Tom] J. Sullivan, Amitabh Mehra, John G. McBride, Duncan Weir, Lin A. Nease, Kirk M. Bresniker, Charles J. Zacky, Michael [Mike] J. Greenside, Alisa Sandoval, Scott P. Allan, Bruce P. Bergmann, Ronald [Ron] P. Dean, Dianne Jiang, Dennis L. Floyd, Evangelos Nikolaropoulos, Andreas Pirrung, Jorg Schwering, pg 112-116

August 1997 v.48 n.4

Visit our website at http://www.hp.com/hpj/journal.html [sic; url no longer functions], pg 3

Cover: The four-way superscalar HP PA 8000 microprocessor

Four-Way Superscaler PA-RISC Processors. The HP PA 8000 and PA 8200 PA-RISC CPUs feature an aggressive four-way superscalar implementation, speculative executive, and on-the-fly instruction reordering, by Anne P. Scott, Kevin P. Burkhart, Ashok Kumar, Richard M. Blumberg, Gregory L. Ranson, pg 8-15

Design Methodologies and Circuit Design Trade-Offs for the HP PA 8000 Processor. This paper discusses the various design methods used in the PA 8000, specific design techniques for the new packaging technology, the clock distribution scheme, cross-chip signal integrity issues, and some of the new tools and techniques, by Paul J. Dorweiler, Floyd E. Moore, D. Douglas Josephson, Glenn T. Colon-Bonet, pg 16-21

Functional Verification of the HP PA 8000 Processor. The advanced microarchitecture of the HP PA 8000 CPU has many features that presented significant new verification challenges. These include out-of-order instruction execution, register renaming, speculative execution, four-way superscalar operation, decoupled instruction fetch, concurrent system bus interface, and PA-RISC 2.0 architecture enhancements. Enhanced functional verification tools and processes were required to address this microarchitectural complexity, by Steven T. Mangelsdorf, Raymond P. Gratias, Richard M. Blumberg, Rohit Bhatia, pg 22-31

Electrical Verification of the HP PA 8000 Processor. Electrical verification applies techniques from both functional verification and reliability and environmental testing to improve the quality of the CPU. Electrical verification checks that the CPU functions correctly under stressful environmental conditions, well outside the normal operating environment, by John W. Bockhaus, Rohit Bhatia, C. Michael Ramsey, Joseph R. Butler, David J. Ljung, pg 32-39

Shmoo Plot Shapes,  pg 35

Solving IC Interconnect Routing for an Advanced PA-RISC Processor. This paper discusses some important new block routing technologies that were required for the HP PA 8000 processor chip. These technologies are implemented in a new block routing system called PA_Route, by James C. Fong, Hoi-Kuen Chan, Martin D. Kruckenberg, pg 40-45

Global Routing – A Block-Level Problem,  pg 42

Detailed Routing Methods, pg 43

Intelligent Networks and the HP OpenCall Technology. The HP OpenCall product family is a portfolio of computer-based telecommunications platforms designed to offer a foundation for advanced network services based on intelligent network concepts. This article concentrates on the HP OpenCall service executive platform, service management platform, and service creation environment, by Tarek Dehni, John O’Connell, Nicolas Raguideau, pg 46-57

Standardization – A Phased Approach, pg 49

HP OpenCall SS7 Platform. The HP OpenCall SS7 platform allows users to build computer-based signaling applications connected to the SS7 signaling network, by Denis Pierrot, Jean-Pierre Allegre, pg 58-64. Signaling System #7.

High Availability in the HP OpenCall SS7 Platform. Fault tolerance in computer systems is discussed and high availability is defined. The theory and operation of the active/standby HP OpenCall solution are presented. Switchover decision-making power is vested in a fault tolerance controller process on each machine, by Brian C. Wyld, Jean-Pierre Allegre, pg 65-71

A Benchtop Inductively Coupled Plasma Mass Spectrometer. The HP 4500 is the first benchtop ICP-MS. It has a new type of optics systems that results in a very low random background and high sensitivity, making analysis down to the subnanogram-per-liter (parts-per-trillion) level feasible. It can be equipped with HP’s ShieldTorch system, which reduces interference from polyatomic icons, by Yoko Kishi, pg 72-79

Audit History and Time-Slice Archiving in an Object DBMS for Laboratory Databases. Development of an object database management system allows rapid, convenient access to large historical data archives generated from complex databases, by Timothy P. Loomis, pg 80-89. ODBMS.

Glossary,  pg 80

Testing Policing in ATM Networks. Policing is one of the key mechanisms used in ATM (Asynchronous Transfer Mode) networks to avoid network congestion. The HP E4223A policing and traffic characterization test application has been developed to test policing implementations in ATM switches before the switches are deployed for commercial service, by Mohammad Makarechian, Nicholas J. Malcolm, pg 90-95

List of Acronyms, pg 90

MOSFET Scaling into the Future. 2D process and device simulators have been used to predict the performance of scaled MOSFETs spanning the 0.35-mm to 0.07-mm generations. Requirements for junction depth and channel doping are discussed. Constant-field scaling is assumed. MOSFET drive current remains nearly constant from one generation to the next and most of the performance improvement comes from the decreasing supply voltage. Gate delay decreases by 30% per generation, nearly the same trend as previous generations. However, this performance gain comes at the price of much higher off-state leakage because of the reduction of the threshold voltage. Various solutions to this high leakage are discussed., by Paul Vande Voorde, pg 96-100

Frequency Modulation of System Clocks for EMI Reduction. This paper focuses on clock dithering as an on-chip technique for EMI reduction. It is a survey paper based on information gathered from inside and outside HP’s Integrated Circuit Business Division (ICBD). It reviews the basic concept, the work that has been done at ICBD and elsewhere, ICBD customer experiences, and lessons drawn from these experiences about design, effectiveness, and customer implementation with ICBD, by Cornelis D. Hoekstra, pg 101-106. Electromagnetic Interference.

Fully Synthesizable Microprocessor Core via HDL Porting. Microprocessing integrated in superchips have traditionally been ported from third-party processor vendors via artwork. A new methodology uses hardware description language (HDL) instead of artwork. Having the HDL source allows the processor design to be optimized for HP’s process in much the same way as other top-down designers, by Jim J. Lin, pg 107-113

General-Purpose 3V CMOS Operational Amplifier with a New Constant-Transconductance Input Stage. Design trade-offs for a low-voltage two-stage amplifier in the HP CMOS14 process are presented and some of the issues of low-voltage analog design are discussed. The design of a new constant-transconductance input stage that has a rail-to-rail common-mode input range is described, along with the rail-to-rail class-AB output stage. The performance specifications and area of this amplifier are compared with a similar design in a previous process, CMOS34, by Derek L. Knee, Charles E. Moore, pg 114-120

Improving Heat Transfer from a Flip-Chip Package. The lid of an ASIC package can significantly increase the temperature of the die by impeding heat transfer. In flip-chip packages the backside of a die can be exposed by eliminating the lid, thus allowing a heat sink to be attached directly. Numerical finite difference methods and experimentation were used to investigate the differences between lidded and lidless flip-chip designs. The results demonstrate that a lidless package is a superior design because of the increased thermal conductivity between the die and the heat sink, by Cullen E. Bash, Richard L. Blanco, pg 121-125

Authors August 1997: Anne P. Scott, Kevin P. Burkhart, Ashok Kumar, Gregory [Greg] L. Ranson, Paul J. Dorweiler, Floyd E. Moore, D. Douglas [Doug] Josephson, Glenn T. Colon-Bonett [Bonet], Steven [Steve] T. Mangelsdorf, Raymond [Ray] P. Gratias, Richard M. Blumberg, Rohit Bhatia, John W. Blockhaus, C. Michael [Mike] Ramsey, Joseph [Joe] R. Bulter, David J. Ljung, James [Jim] C. Fong, Hoi-Kuen Chen, Martin D. Kruckenberg, Tarek Dehni, John M. O’Connell, Nicolas Raguideau, Denis Pierrott [Pierrot], Jean-Pierre Allegre, Brian C. Wyld, Yoko Kishi, Timothy [Tim] P. Loomis, Mohammad Makarechian, Nicholas J. Malcom, Paul Vande Voorde, Cornelis [Casey] D. Hoekstra, Jim J. Lin, Derek L. Knee, Charles E. Moore, Cullen E. Bash, Richard [Rich] L. Blanco, pg 126-131

Reader Forum: A letter from Dennis D. McCarthy and John A. Kusters regarding “The Global Positioning System and HP SmartClock”, page 60 in the December 1996 issue, pg 132

December 1997 v.48 n.5

Cover: An artistic rendition of global internet communications, showing fiber-optic technology as the backbone for universal connectivity

Tera Era, by Waguih Ishak, pg 2-3

Communications Challenges of the Digital Information Utility. The Internet and World Wide Web are forerunners of a digital information utility that in time will provide computing as well as information to society, just as other utilities provide water and electric power, by Joel S. Birnbaum, pg 6-10

[Author:] Joel S. Birnbaum, pg 6

Residential Communications. Establishing a communications infrastructure to get information to, from, or around a residence is not a straightforward task today. However, in the future the equipment and wiring within a residence for Internet communications will be treated the same as the wiring and equipment for services such as telephone, electricity, and cable television are treated today, by Daniel A. Pitt, pg 11-18

[Author:] Daniel [Dan] A. Pitt, pg 11

Optical Networks: Backbones for Universal Connectivity. Communications traffic in the world’s fiber-optic backbone network is growing more than 10% per year and the growth rate is accelerating. The ever-increasing bandwidth demands are being met by an array of technological innovations including higher time-division multiplex (TDM) transmission rates combined with wavelength-division multiplex (WDM) overlays, by Robert C. Bray, Douglas M. Baney, pg 19-31

[Authors:] Robert [Bob] C. Bray, Douglas [Doug] M. Baney, pg 19

Data Transmission for Higher-Speed IEEE 802 LANs Using Twisted-Pair Copper Cabling. Transmission at 424.8 Mbits/s using Category 5 cable can meet both industrial and the more stringent domestic emissions regulations. The design is robust in operation and the complexity is not much greater than that used for the 100-Mbit/s rate, by Eric Deliot, Alistair N. Coles, Steven G. Methley, pg 32-41

[Authors:] Steven [Steve] G. Methley, Alistair N. Coles, Eric Deliot, pg 41

SpectraLAN: A Low-Cost Multiwavelength Local Area Network. The first-generation SpectraLan module will allow existing 62.5-mm multimode fiber-optic links to carry four times higher data rates than is possible with conventional methods. Four-channel error-free operation at aggregate data rates of 2.5 and 4.0 Gbits/s has been demonstrated over distances of 500 m and 300 m, respectively. The module is compact and potentially low-cost, by Brian E. Lemoff, Lewis B. Aronson, Lisa A. Buckman, pg 42-52

[Authors:] Brian E. Lemoff, Lewis [Lew] B. Aronson, Lisa A. Buckman, pg 52

Gigabyte-per-Second Optical Interconnection Modules for Data Communications. A ten-channel parallel optical link module operating at 1 Gbit/s per channel has been developed in the POLO (Parallel Optical Link Organization) program. Key components include vertical-cavity surface emitting laser and detector arrays, bipolar transceiver ICs, a high-speed ball-grid array package, polymer waveguides, and multichannel ribbon fiber connectors. Applications of the POLO module include computer clusters, switching systems, and multimedia, by Kenneth H. Hahn, Kirk S. Giboney, Robert E. Wilson, Joseph Straznicky, pg 53-61

[Authors:] Kenneth [Ken] A. Hahn, Kirk S. Giboney, Joseph [Joe] Straznicky, Robert [Rob] E. Wilson, pg 61

Developing Leading-Edge Fiber-Optic Network Link Standards. Advances in fiber-optic network technology within Hewlett Packard are achieved by close cooperation between Hewlett-Packard Laboratories (HPL) and Hewlett-Packard’s Communications Semiconductor Solutions Division (CSSD). This paper explores the interaction between HPL and CSSD for the advancement of high-speed LAN standards, particularly in the ATM Forum and IEEE 802.3z (Gbit/s Ethernet). Details of major technical contributions to 622-Mbit/s ATM and Gbit/s Ethernet specifications are presented, by David G. Cunningham, Delon C. Hanson, Mark C. Nowell, C. Steven Joiner, pg 62-73

[Authors:] David G. Cunningham, Delon [Del] C. Hanson, Mark C. Nowell, C. Steven [Steve] Joiner, pg 73

1300-nm Strained Quantum Well Lasers For Fiber-Optic Communications. This paper describes new uncooled strained quantum well lasers for SONET/SDH systems. New Fabry-Perot lasers for short-haul and intermediate link applications are extremely reliable, have high ex-facet power, and have record low threshold currents, making lower packaging costs possible. Uncooled distributed feedback lasers for the long-haul market at 622 Mbits/s and 2.488 Gbits/s are discussed. These operate from – 40°C to +85°C with extremely good threshold and power characteristics, by William S. Ring, Simon J. Wrathall, Adrian J. Taylor, pg 74-85

[Authors:] William [Bill] S. Ring, Simon J. Wrathall, Adrian J. Taylog, pg 85

Modeled Optimization and Experimental Verification of a Low-Dispersion Source for Long-Haul 2.488-Gbit/s Systems. This paper describes microwave, laser, and fiber models that were used in the development of the HP LSC2500 2.488 Gbit/s laser diode module. Knowledge of the modeled behavior of the laser diode as a function of the input electrical pulse shape has led to deliberately shaping the input pulse to give the minimum wavelength excursion during direct modulation, and therefore a high yield of low-dispersion-penalty laser diodes. These devices can be successfully used for transmission distances in excess of 200 km, by Ian H. White, Joseph A. Barnard, Stephen M. Gee, Herbert Lage, Chris Park, Kevin A. Williams, Richard V. Penty, pg 86-100

[Authors:] Stephen [Steve] M. Gee, Kevin A.Williams, Joseph A. Barnard, Herbert Lage, Richard V. Penty, Chris Park, Ian H. White, pg 101

Flip-Chip Photodetector for High-Speed Communications Instrumentation. A family of 7-GHz bandwidth optical receivers and a nine-channel optical receiver with a gigabit-per-second data rate per channel have been developed for multigigabit lightwave test systems for long-haul fiber-optic telecommunications links and gigabit optical interconnects for computer systems. A new micro-flip-chip process, featuring liftoff-based small-diameter solder bumps, is incorporated with HP high-speed InP p-i-n photodetectors to minimize parasitic capacitance and inductance and enhance responsivity, by Susan R. Sloan, Tun S. Tan, David M. Braun, Tim L. Bagwell, Christopher P. Kocot, Joseph Straznicky, pg 102-109

[Authors:] Tun S. Tan, Christopher [Chris] P. Kocot, David M. Braun, Susan R. Sloan, Tim L. Bagwell, pg 110

A 2.488-Gbit/s Silicon Bipolar Clock and Data Recovery Circuit for SONET Fiber-Optic Communications Networks. Adjustment-free clock and data recovery for 2.488 Gbit/s SONET applications is provided by a 1.77W, 3.45 x 3.45-mm² chip implemented in a 25-GHz f_T silicon bipolar process. The chip has an on-chip VCO and operates from 2 to 3 Gbits/s over process, voltage, and temperature variations with a single off-chip filter capacitor. For network monitoring, a highly reliable loss-of-signal detector is provided. For good mechanical, thermal, and RF performance, a custom package was developed using HP’s fine-line hybrid process, by Richard Walker, Cheryl Stout, Chu-Sun Yen, Lewis R. Dove, pg 111-119

[Authors:] Richard [Rick] Walker, Cheryl Stout, Chu-Sun Yen, Lewis [Lew] R. Dove, pg 119

Testing Erbium-Doped Fiber Amplifiers. EDFAs can overcome losses in long fiber-optic links independent of the digital bit rate, and can amplify multiple signals in a wavelength-division multiplexed (WDM) systems architecture. As more and more EDFAs are deployed, designers add new features, creating a need for more sophisticated testing. This paper provides a brief survey of the tests required to characterize EDFAs, by James R. Stimple, pg 120-126

[Author:]  James [Jim] R. Stimple, pg 102

Hewlett-Packard Professional Books. Listed below are the books published in 1997, pg 127

February 1996 v.47 n.1

In Memoriam: Barney Oliver, pg 3

Cover: The HP 9000 J/K-class servers and workstations and the HP 3000 Series 9x9KS servers

Symmetric Multiprocessing Workstations and Servers System-Designed for High Performance and Low Cost. A new family of workstations and servers provides enhanced system performance in several price classes. The HP 9000 Series 700 J-class workstations provide up to 2-way symmetric multiprocessing, while the HP 9000 Series 800 K-class servers (technical servers, file servers) and HP 3000 Series 9x9KS business-oriented systems provide up to 4-way symmetric multiprocessing, by Brendan A. Voge, Badir M. Mousa, Loren P. Staley, Matt J. Harline, pg 8-17

K-Class Power System, by Gerald J. Nelson, James K. Koch, pg 16-17

A High-Performance, Low-Cost Multiprocessor Bus for Workstations and Midrange Servers. The Runaway bus, a synchronous, 64-bit, split-transaction, time multiplexed address and data bus, is a new processor-memory-I/O interconnect optimized for one-way to four-way symmetric multiprocessing systems. It is capable of sustained memory bandwidths of up to 768 megabytes per second in a four-way system, by Nicholas S. Fiduccia, William R. Bryg, Kenneth K. Chan, pg 18-24. 9000 K-class, J-class.

Runway Bus Electrical Design Considerations, by Nicholas S. Fiduccia, pg 22-23

Design of the HP PA 7200 CPU. The PA 7200 processor chip is specifically designed to give enhanced performance in a four-way multiprocessor system without additional interface circuits. It has a new data cache organization, a prefetching mechanism, and two integer ALUs for general integer superscalar execution, by Francis X. Schumacher, Gordon P. Kurpanek, Kenneth K. Chan, Cyrus C. Hay, Jason Zheng, John R. Keller, pg 25-33

Verification, Characterization, and Debugging of the HP PA 7200 Processor. To guarantee a high-quality product the HP PA 7200 CPU chip was subjected to functional and electrical verification. This article describes the testing methods, the debugging tools and approaches, and the impact of the interactions between the chip design and the IC fabrication process, by David N. Goldberg, James R. McGee, Thomas B. Alexander, Kent A. Dickey, Akshya Prakash, Nazeem Noordeen, Ross V. La Fetra, pg 34-43

A New Memory System Design for Commercial and Technical Computing Products. This new design is targeted for use in a wide range of HP commercial servers and technical workstations. It offers improved customer application performance through improvements in capacity, bandwidth, latency, performance scalability, reliability, and availability. Two keys to the improved performance are system-level parallelism and memory interleaving, by Thomas R. Hotchkiss, Norman D. Marschke, Richard M. McClosky, pg 44-51. HP 9000 J/K-class, Runway Bus.

Hardware Cache Coherent Input/Output. Hardware cache coherent I/O is a new feature of the PA-RISC architecture that involves the I/O hardware in ensuring cache coherence, thereby reducing CPU and memory overhead and increasing performance, by Helen Nusbaum, Michael K. Traynor, Todd J. Kjos, Brendan A. Voge, pg 52-59. HP 9000 J/K-class, HP PA-RISC.

A 1.0625-Gbit/s Fibre Channel Chipset with Laser Driver. This chipset implements the Fibre Channel FC-0 physical layer specification at 1.0625 Gbits/s. The transmitters features 20:1 data multiplexing with a comma character generator and a clock synthesis phase-locked loop, and includes a laser driver and a fault monitor for safety. The receiver provides the functions of clock recovery, 1:20 data demultiplexing, comma character detection, and word alignment, and includes redundant loss-of-signal alarms for eye safety. A single-chip version with both transmitter and receiver integrated is designed for disk drive applications using the Fibre Channel arbitrated loop protocol, by Benny W.H. Lai, Margaret M. Nakamoto, Richard Dugan, Justin S. Chang, pg 60-67. G-Link chipset, HDMP-1512, HDMP-1514.

Applying the Code Inspection Process to Hardware Descriptions. The code inspection process from the software world has been applied to Verilog HDL (hardware description language) code. This paper explains the code inspection process and the roles and responsibilities of the participants. It explores the special challenges of inspecting HDL, the types of findings made, and the lessons learned from using the process for a year, by Joseph J. Gilray, pg 68-72

Overview of Code-Domain Power, Timing, and Phase Measurements. Telecommunications Industry Association standards specify various measurements designed to ensure the compatibility of North American CDMA (code division multiple access) cellular transmitters and receivers. This paper is a tutorial overview of the operation of the measurement algorithms in the HP 83203B CDMA cellular adapter, which is designed to make the base station transmitter measurements specified in the standards, by Raymond A. Birgenheier, pg 73-93. TIA IS-95/97.

Authors February 1996: Matt J. Harline, Brendan A. Voge, Loren P. Staley, Badir [Bud] M. Mousa, William [Bill] R. Bryg, Kenneth [Ken] K. Chan, Nicholas [Nick] S. Fiduccia, Cyrus [Cy] C. Hay, John R. Keller, Gordon P. Kurpanek, Francis X. Schumacher, Jason Zheng, Thomas [Tom] B. Alexander, Kent A. Dickey, David [Dave] N. Goldberg, Ross V. La Fetra, James [Jim] R. McGee, Nazeem Noordeen, Akshya Prakash, Thomas [Tom] R. Hotchkiss, Norman [Norm] D. Marschke, Richard [Rich] M. McClosky, Todd J. Kjos, Helen Nusbaum, Michael [Mike] K. Traynor, Justin S. Chang, Richard Dugan, Benny W. H. Lai, Margaret M. Nakamoto, Joseph [Joe] J. Gilray, Raymond [Ray] A. Birgenheier,  pg 94-97

April 1996 v.47 n.2

Cover: A screen showing a typical collection of icons, panels, windows, and dialog boxes that make up the graphical user interface of the Common Desktop Environment

A Common Desktop Environment for Platforms Based on the UNIXÒ Operating System. User interface technologies from four companies have been combined to create a single UNIX desktop standard that provides a common look and feel for end users and a common set of tools for system administrators and application developers, by Dana E. Laursen, Jon A. Brewster, Brian E. Cripe, pg 6-11. CDE.

Appendix A: CDE Application Programming Interfaces, pg 11-14

Accessing and Administering Applications in CDE. Setting up transparent access to applications and resources in a highly networked environment is made simpler by facilities that enable system administrators to integrate applications into the CDE desktop, by Anna Ellendman, William R. Yoder, pg 15-23. Common Desktop Environment.

Application Servers and Clients in CDE, pg 22

The CDE Action and Data Typing Services. Several different types of databases and their associated APIs are involved in determining the look and behavior of icons presented in the Common Desktop Environment, by Arthur F. Barstow, pg 24-28

Migrating HP VUE Desktop Customizations to CDE. With CDE becoming the UNIXÒ desktop standard, it is important to allow HP VUE users to preserve their customizations when moving over to the CDE desktop. A set of tools has been developed to make this transactions as complete and effortless as possible, by Molly Joy, pg 29-37. Visual User Environment, Common Desktop Environment.

A Media-Rich Online Help System. Based on an existing fast and easy-to-use online help system, the CDE help system extends this baseline to provide features that will work across all UNIXÒ platforms, by Lori A. Cook, Steven P. Hiebert, Michael R. Wilson, pg 38-49. Common Desktop Environment.

Managing a Multicompany Software Development Project. The development of the Common Desktop Environment version 1.0 involved a joint engineering project between four companies that normally compete in the marketplace, by Robert M. Miller, pg 50-53. CDE, IBM, Sun Microsystems, USL, UNIX.

Design and Development of the CDE 1.0 Test Suite. Testing a product whose parts are being developed in four different environments that have different test tools and test procedures requires setting some rigorous test goals and objectives at the beginning of the project, by Paul R. Ritter, Kristann L. Orton, pg 54-61. CDE, Common Desktop Environment.

Synlib: The Core of CDE Tests. Synlib is an application program interface for creating tests for graphical user interface applications. A collection of Synlib programs, each designed to verify a specific property of the target software, forms a test suite for the application. Synlib tests can be completely platform independent – an advantage for testing the Common Desktop Environment (CDE), which runs on the platforms of the four participating companies, by Sankar L. Chakrabarti, pg 62-65

A Hybrid Power Module for a Mobile Communications Telephone. This article describes a 3.5-watt power module designed for a GSM (Global System for Mobile Communications) handheld telephone. The design features proprietary silicon power bipolar devices, lumped elements for input, interstage, and output matching, thick-film alumina ceramic technology, and laser trimmed bias resistors. High-volume manufacturing was a design requirement, by Melanie M. Daniels, pg 66-72

Automated C-Terminal Protein Sequence Analysis Using the HP G1009A C-Terminal Protein Sequencing System. The HP G1009A is an automated system for the carboxy-terminal amino acid sequence analysis of protein samples. It detects and sequences through any of the twenty common amino acids. This paper describes a number of applications that demonstrates its capabilities, by Jerome M. Bailey, Chad G. Miller, pg 73-82

Abbreviations for the Common Amino Acids, pg 74

Measuring Parasitic Capacitance and Inductance Using TDR. Time-domain reflectometry (TDR) is commonly used as a convenient method of determining the characteristics impedance of a transmission line or quantifying reflections caused by discontinuities along or at the termination of a transmission line. TDR can also be used to measure quantities such as the input capacitance of a voltage probe, the inductance of a jumper wire, the end-to-end capacitance of a resistor, or the effective loading of a PCI card. Element values can be calculated directly from the integral of the reflected or transmitted waveform, by David J. Dascher, pg 83-96

Authors April 1996: Brian E. Cripe, Jon A. Brewster, Dana E. Laursen, Anna Ellendman, William [Bill] R. Yoder, Arthur [Art] F. Barstow, Molly Joy, Lori A. Cook, Stephen [Steve] P. Hiebert, Michael [Mike] R. Wilson, Robert [Bob] M. Miller, Kristann L. Orton, Paul R. Ritter, Sankar L. Chakrabarti, Melanie M. Daniels, Chad G. Miller, Jerome M. Bailey, David [Dave] J. Dascher, pg 97-99

June 1996 v.47 n.3

In Memoriam: David Packard, pg 2

Cover: A rendition of the multiple views of time-correlated data provided by the HP 16505A prototype analyzer

Reducing Time to Insight in Digital System Integration. Digital design teams are facing exponentially growing complexities and need processes and tools that reduce the time needed to gain insight into difficult system integration problems. This article describes modern digital systems in terms of the problems they create in the system integration phase. The debug cycle is described with special emphasis on the “insight loop”, the most time-consuming phase of system integration. A case study from an HP workstation design effort is used to illustrate the principles. A new digital analysis tool, the HP 16505A prototype analyzer, is introduced as a means of solving these vexing problems more quickly by reducing time to insight, by Patrick J. Byrne, pg 6-14

Prototype Analyzer Architecture. The HP 16505A architecture allows multiple concurrent views of acquired logic analysis data. Markers on all views are correlated. The user only needs to place the marker on one view and the markers on the other views automatically relocate. Thus a stack anomaly in one view can be immediately correlated with the software routine causing the violation, by Jeffrey E. Roeca, pg 15-21

Determining a Best-Fit Measurement Server Implementation for Digital Design Team Solutions. Prototype analyzer customers wanted fast throughput, quick answers, a turnkey solution, an affordable base system price, connection to diverse open-systems networks and platforms, and interfaces to a wide variety of tools. An encapsulated measurement server architecture based on a dedicated workstation and a SCSI II interface best fit the requirements, by Gregory J. Peters, pg 22-29. 16505A.

A Normalized Data Library for Prototype Analysis. The goal was that each analysis and display tool to be included in the prototype analyzer should be designed and written only once. Therefore, the data library is designed to normalize the variety of basic logic analyzer data types and the variety of postacquisition data types generated by various analysis tools and to present this data to other analysis and display tools in a standard format, by Mark P. Schnaible, pg 30-37. 16505A.

A Full-Featured PentiumÒ PCI-Based Notebook Computer. The HP OmniBook 5000 computer takes advantage of new technologies such as mobile Pentium, PCI, plug and play, lithium-ion batteries, and hot docking to give users the same capabilities as their desktop computers, by Timothy F. Myers, pg 38-44

Flyback Charger Circuit, pg 42

A Graphing Calculator for Mathematics and Science Classes. The HP 38G calculator allows teachers to direct students and keep them focused while they explore mathematical and scientific concepts. It features aplets, which are small applications that focus on a particular area of the curriculum and can be easily distributed from the teacher’s calculator to the students’, by James A. Donnelly, Feng Yuan, Ted W. Beers, Diana K. Byrne, Robert W. Jones, pg 45-58. HP 38G.

Distributed Software Team, pg 54

Creating HP 38G Aplets. This article explores a simple aplet and shows how to construct an aplet called PolySides, by James A. Donnelly, pg 59-63

HP PalmVue: A New Healthcare Information Product. The HP PalmVue system integrates personal computer, alphanumeric paging, and palmtop computer technology into an effective solution for delivering timely and high-quality patient data to mobile physicians, by Jon D.Waisnor, Allan P. Sherman, Edward H. Schmuhl, pg 64-69. M1490A.

Data Through Paging Technology, pg 68

Constructing An Application Server. In a dynamic networked environment in which there are several hundred workstations and servers there is a constant demand for new versions of software. In this environment software installation procedures must be quick, flexible, and tolerant of change, by Jill E. Swenson, pg 70-75

Interface Translation for Reuse of Assembly-Language Modules in a Two-Language Environment. A mixture of low-level and high-level implementation languages is likely when old modules are reused. In a two-language system, some interfaces must be expressed in both languages. This paper describes the design and implementation of a production-quality software tool that solves this problem for the C programming language, by James R. Buffenbarger, pg 76-81

Authors June 1996: Patrick [Pat] J. Byrne, Jeffrey [Jeff] E. Roeca, Gregory [Greg] J. Peters, Mark P. Schnaible, Timothy [Tim] F. Myers, Ted W. Beers, Diana K. Byrne, James [Jim] A. Donnelly, Robert [Max] W. Jones, Feng Yuan, Edward [Ted] H. Schmuhl, Allan [Al] P. Sherman,  Jon D. Waisnor, Jill E. Swenson, James [Jim] R. Buffenbarger, pg 82-84

August 1996 v.47 n.4

Cover: A computer-colorized and embossed photograph of a cracked 58Bi42Sn solder joint, showing that the brittle fracture of the Bi-rich phase was the cause of the brittle failure of the solder

Implementing the Capability Maturity Model for Software Development. Continuous support for a software development improvement effort requires at least two things: a clearly defined improvement model and success at applying the model in the organization. One HP division was able to apply one such model and achieve measurable success on several product releases, by Douglas E. Lowe, Guy M. Cox, pg 6-14. CMM.

Software Failure Analysis for High-Return Process Improvement Decisions. Software failure analysis and root-cause analysis have become valuable tools in enabling organizations to determine the weaknesses in their development processes and decide what changes they need to make and where, by Robert B. Grady, pg 15-24

HP Press Book Excerpt. Evolutionary Fusion: A Customer-Oriented Incremental Life Cycle for Fusion. Creating and maintaining a consistent set of specifications that result in software solutions that match customer’s needs is always a challenge. A method is described that breaks the software life cycle into smaller chunks so that customer input is allowed throughout the process, by Todd Cotton, pg 25-38

What Is Fusion?, by Derek Coleman, pg 27

Fusion in the Real World, by Ruth Malan, Reed P. Letsinger, pg 37

The Evolutionary Development Model for Software. The traditional waterfall life cycle has been the mainstay for software developers for many years. For software products that do not change very much once they are specified, the waterfall model is still viable. However, for software products that have their feature sets redefined during development because of user feedback and other factors, the traditional waterfall model is no longer appropriate, by Barbara A. Zimmer, Elaine L. May, pg 39-45. EVO, Evolutionary Development.

The Software Initiative Program, pg 42

HP Domain Analysis: Producing Useful Models for Reusable Software. Early software reuse efforts focused on libraries of general-purpose routines or functions. These fine-grained assets did not produce the hoped-for quality and productivity improvements. Recent software reuse efforts have shown that architecture-based, domain-specific reuse can yield greater quality and productivity improvements, by Patricia Collins Cornwell, pg 46-55

Reuse Roles: Producers, Supporters, and Utilizers, pg 50

A Model for Platform Development. For many software and firmware products today, creating the entire architecture and design and all the software modules from the ground up is no longer feasible, especially from the point of view of product quality, ease of implementation and short product development schedules. Therefore, the trend is to create new product versions by intentionally reusing the architecture, design, and code from an established software platform, by Emil Jandourek, pg 56-71

A Decision Support System for Integrated Circuit Package Selection. The package provides signal and power distribution, heat dissipation, and environmental protection for an integrated circuit (IC). The process of selecting a package is complicated by the large number of packaging alternatives with overlapping capabilities. To handle these difficulties, a decision support system was developed. The Package Selection Systems (PASS) combines expert system tools and multiple-attribute decision making techniques. The expert system provides a list of technically feasible alternatives. The multiple-attribute decision making modules are used to rank the alternatives based on nontechnical criteria, by Craig J. Tanner, pg 72-79. MLM, Manufacturingless Manufacturers, MADM.

Cycle Time Improvement for Fuji IP2 Pick-and-Place Machines. Some of the major enhancements are eliminating head contention, reducing or eliminating nozzle changes, supporting user-defined nozzles, supporting large nozzles for holders 2 and 3, and being able to define multiple part data for a given part number. The cycle time improvement exceeds the original goal of 5%, and the result at one surface mount center was more than 16% over hand-created and optimized recipes. The solution helps both the high-volume and the high-mix centers, by Fereydoon Safai, pg 80-83

Reducing Setup Time for Printed Circuit Assembly. In 1994, HP’s Man-Link recipe generation system was enhanced to reduce the time required for setting up pick-and-place machines. This was done by ordering the products to exploit the commonality of parts among them and by creating sequences of setups that differ as little as possible from one another. This paper documents the issues and trade-offs and discusses the potential benefits, by Richard C. Palm, Jr., pg 84-90

Low-Temperature Solders. The application of low-temperature solders in surface mount assembly processes for products that do not experience harsh temperature environments is technically feasible. One single alloy may not be appropriate as a universal solutions, by Hubert A. Vander Plas, Zequn Mei, Helen A. Holder, pg 91-98. EADC, Electronic Assembly Development Center.

Assessment of Low-Temperature Fluxes. The subject of this paper is the evaluation of the wetting balance as a technique for studying the flux activity of newly developed low-temperature solder paste fluxes. The most effective configuration of the wetting balance was the standard configuration with only one change: the PbSn eutectic solder was replaced with a eutectic solder alloy with a melting point of 58°C. Since 58°C is significantly less than the proposed activation temperatures of the solder fluxes, wetting curves as a function of temperature could be studied for each of the fluxes. The resulting data was used to rank the fluxes in terms of the activation requirement, by Helen Holder, Zequn Mei, Russell B. Cinque, Hubert A. Vander Plas, pg 99-103

October 1996 v.47 n.5

Cover: An artistic rendition of telecommunications, showing a satellite antenna in the background and an HP OEMF network map and alarm viewer for a mobile network in the foreground

A Platform for Building Integrated Telecommunication Network Management Applications. Telecommunications companies today are faced with rapid technological change, large heterogeneous environments, and a greater need to provide customers with products that ensure reliable, cost-effective network service. This means that these companies need a platform that has a visionary strategy that enables them to develop standards-compliant network management solutions for a continually changing environment, by Prabha G. Chadayammuri, pg 6-16

Distributed Processing Environment: A Platform for Distributed Telecommunications Applications. Vendors developing applications for a heterogeneous, distributed environment need to be able to build towards a platform that integrates all the management and control functions of distributed computing into a unified software architecture that allows their applications to be available from any point in the network regardless of the system or geographic location, by Trong Nguyen, Frank Quemada, Frank Leong, Satya P. Mylavarabhata, pg 17-21. DPE.

HP OEMF: Alarm Management in Telecommunications Networks. This article explains the HP OpenView Element Management Framework concept, which is based on the HP OpenView Fault Management Platform (FMP) and complements the functionality of the FMP to provide an integrated network management solution. This article also explains the FMP, which facilitates efficient management of alarms in a telecommunications network, and the open APIs provided in the FMP, which allow seamless integration with other applications, by Sujai Hajela, pg 22-30

HP OpenView Event Correlation Services. When a fault occurs in a telecommunications system, it can cause an event storm of several hundred events per second for tens of seconds. HP OpenView Event Correlation Services (ECS) helps operators interpret such storms. It consists of an ECS Designer for the interactive development of correlation rules and an ECS engine for executive of these rules, by Kenneth R. Sheers, pg 31-42

Correlation Node Types, pg 34

Count Node, pg 36

Unless Node, pg 37

Table Node, pg 38

Fact Store and Data Store, pg 39

Annotation, pg 40

A Modeling Toolset for the Analysis and Design of OSI Network Management Objects. To deal with the complexity of network management standards and the increasing demand to deploy network management applications quickly, analysts and designers need a set of tools to help them quickly and easily model, define, and develop new network management objects, by Jacqueline A. Bray, pg 43-49. GDMO, Guidelines for the Definition of Managed Objects.

Appendix A: A Portion of a GDMO Definition for a UNIX Password File, pg 5-51

A Toolkit for Developing TMN Manager/Agent Applications. Developing manager and agent applications for telecommunications network management that conform to standards can be a time-consuming task because of the number of APIs and data types involved in dealing with network data and protocols. The HP OpenView Managed Object Toolkit aids and accelerates the development of these TMN applications, by Lisa A. Speaker, pg 52-61

A Software Toolkit for Developing Telecommunications Application Components. To be effective, application developers must understand the data available to their applications, the operations required to access the data, and the steps required to turn their understanding into an implementation. A prototype development environment has been built that helps the developer explore and understand the data in the Management Information Base (MIB) and construct and deploy pieces of TMN management applications, by Alasdair D. Cox, pg 62-69

Business Process Flow Management and its Application in the Telecommunications Management Network. HP OpenPM is an open, enterprise-capable, object-oriented business process flow management system that manages business activities supporting complex enterprise processes in a distributed heterogeneous computing environment. It is a middleware service that represents a substantial evolution from traditional workflow technologies, by Qiming Chen, James W. Davis, Weimin Du, Ming-Chien Shan, pg 70-76

HP OpenView Agent Tester Toolkit. In developing HP OpenView agents, a major challenge is to develop and test both the agent and the manager simultaneously. To fill this need, the HP OpenView Agent Tester Toolkit generates tests and allows the developer to execute these tests individually or as a set, by Paul A. Stoecker, pg 77-80

Storage Management Solutions for Distributed Computing Environments. Strategies for dealing with the vast amounts of data generated by today’s information technology environments involve more than just larger and larger disk drives. They include the right combination of different storage devices to deal with offline, nearline, and online data storage and scalable management software, by Kelly A. Emo, Reiner Lomb, Roy M. VanDoorn, pg 81-89

Authors October 1996: Prabha G. Chadayammuri, Frank Leong, Satya P. Mylavarabhatla, Trong Nguyen, Frank Quemada, Sujai Hajela, Kenneth [Ken] R. Sheers, Jacqueline [Jackie] A. Bray, Lisa A. Speaker, Alasdair D. Cox, Ming-Chien Shan, James [Jim] W. Davis, Weimin Du, Qiming Chen, Paul A. Stoecker, Reiner Lomb, Kelly A. Emo, Roy M. Vandoorn, Meryem Primmer, Judith [Judy] A. Smith, pg 90-93

An Introduction to Fibre Channel. Fibre Channel is a flexible, scalable, high-speed data transfer interface that can operate over a variety of both copper wire and optical fiber at data rates up to 250 times faster than existing communication interfaces. Networking and I/O protocols, such as SCSI commands, are mapped to Fibre Channel constructs, encapsulated, and transported within Fibre Channel frames, by Meryem Primmer, pg 94-98

Tachyon: A Gigabit Fibre Channel Protocol Chip. The Tackyon chip implements the FC-1 and FC-2 layers of the five-layer Fibre Channel standard. The chip enables a seamless interface to the physical FC-0 layer and low-cost Fibre Channel attachments for hosts, systems, and peripherals on both industry-standard and proprietary buses through the Tachyon system interface. It allows sustained gigabit data throughput at distance options from ten meters on copper to ten kilometers over single-mode optical fiber, by Meryem Primmer, Judith A. Smith, pg 99-112

December 1996 v.47 n.6

New: 1996 Index is available at URL: http://www.hp.com/hpj/index96.html  [sic; url no longer functions]

Cover: A color-graded eye diagram produced by the HP 83480 digital communications analyzer, superimposed on a display of the frequency response of its optical channel

A New Instrument for Waveform Analysis of Digital Communications Signals. The HP 83480 digital communications analyzer combines an optical reference receiver with an oscilloscope and communications measurement firmware. Its measurements meet the requirements of the SONET and SDH fiber-optic communications standards, by Christopher M. Miller, Michael J. Karin, Stephen W. Hinch, pg 6-12

Eye Diagrams and Sampling Oscilloscopes, pg 8-9

Firmware Measurement Algorithms for the HP 83480 Digital Communications Analyzer. Parametric measurements measure waveform properties such as rise time, fall time, overshoot, period, and amplitude on either a pulse waveform or an eye diagram. Mask measurements compare the shape of the waveform to a predefined mask. Eye parameter measurements measure properties that are unique to eye diagrams, such as eye height, eye width, jitter, crossing height, and extinction ration, by Christopher P. Duff, Stephen W. Hinch, Michael G. Hart, pg 13-21

HP Eyeline Display Mode, p 18-19

Design of Optical Receiver Modules for Digital Communications Analysis. These three bit-rate-specific optical plug-in modules are essential components of the HP 83480A Digital Communications Analyzer. They are for data rates of 155/622 Mbits/s, 2.488 Gbits/s, and 9.953 Gbits/s, by Christopher M. Miller, Randall King, Mark J. Woodward, Tim L. Bagwell, Joseph Straznicky, Naily L. Whang, Donald L. Faller, Jr., pg 22-31

Transimpedance Amplifier O/E Converter Design, pg 29

Differential Time-Domain Reflectometry Module for a Digital Oscilloscope and Communications Analyzer. The HP 54754A differential TDR plug-in conjunction with the HP 54750 digital oscilloscope or the HP 83480 digital communications analyzer significantly improves the speed and ease of making critical measurements in today’s high-speed systems, by Michael M. McTigue, Christopher P. Duff, pg 32-36

Frequency Response Measurement of Digital Communications Analyzer Plug-in Modules. It has been extremely difficult to characterize the SONET/SDH standard receiver with tolerances of ±0.3 dB. This paper describes a method for calibrating photoreceiver frequency response with the low inherent uncertainty of the U.S. National Institute of Standards and Technology Nd:YAG heterodyne system and transferring this calibration to a production test system while maintaining a low uncertainty, by Rin Park, Paul D. Hale, pg 37-40

Radially Staggered Bonding Technology. This new approach to fine-pitch integrated circuit bonding entails a new configuration of bonding pads on the die, dual-loop wire bonding, and a new leadframe design that minimizes wire lengths. The approach bypasses the usual obstacles to fine-pitch bonding that arise with the conventional in-line approach, thus providing appreciable die size and cost reduction with a minimal assembly cost penalty, by Rajendra D. Pendse, Rita N. Horner, Fan Kee Loh, pg 41-50

Implementation of Pad Circuitry for Radially Staggered Bond Pad Arrangements. One approach to pushing the limits of wire bonding pitch in IC packages is to use two rows of radially staggered bond pads. This paper discusses the design of pad circuitry to mesh with the radially staggered bond pad arrangement. A test chip that incorporates suitable test structures was designed, fabricated, packaged and tested to verify the viability of the approach, by Rajendra D. Pendse, Fan Kee Loh, Rita N. Horner, pg 51-54

A Miniature Surface Mount Reflective Optical Shaft Encoder. The HEDR-8000 Series encoders provide two-channel medium-resolution encoding performance in a very small SO-8 plastic package. Their small size, reflective operation, and low cost enable customers to design them into applications that were impossible for earlier encoders, such as feedback sensing for the miniature motors used in copiers, cameras, vending machines, and card readers, by Ram S. Krishnan, Thomas J. Lugaresi, Richard Ruh, pg 55-59

The Global Positioning System and HP SmartClock. The U.S. Department of Defense Global Positioning Systems has inherent problems that limit its use as a source of timing. HP SmartClock is a collection of software algorithms that solve or greatly minimize these problems, by John A. Kusters, pg 60-67. GPS.

See Also: Reader Forum: A letter from Dennis D. McCarthy and John A. Kusters regarding “The Global Positioning System and HP SmartClock”, page 132 in the August 1997 issue

Universal Time Coordinated (UTC), pg 65

The Third-Generation HP ATM Tester. Breaking away from the traditional bounds of transmission and protocol analyzers, the HP E5200A broadband service analyzer redefines the way in which the interactions between protocol layers at multiple points in the network are analyzed and presented, leading to the new concept of service analysis, by Stewart W. Day, Thomas F. Cappellari, Geoffrey H. Nelson, pg 68-73

Glossary, pg 69

Managed Objects for Internal Application Control. Managed objects are fundamental to the software architecture of the HP E5200A broadband service analyzer. Typically used to control remote network elements, managed objects are also used internally by the service analyzer’s application to control application objects, by John P. Nakulski, pg 74-78

Macros, pg 77

Developing a Design for Manufacturability Focus. The HP Australian Telecommunication Operation has rapidly evolved from a custom test instrument developer to an operation that develops and produces products in higher volumes. Significant cultural and technological hurdles have been overcome during the transition to an operation focused on design for manufacturability, by John G. Fuller, pg 79-84. ATO.

HP E5200A Broadband Service Analyzer EMC Design, by Cary J. Wright, pg 80-81

HP E5200A Broadband Service Analyzer Surface Mount Assembly, by Wyatt Luce, pg 83

Production Test Strategy for the HP E5200A Broadband Service Analyzer. Boundary scan and built-in self-test are supplemented by conventional testing techniques. Eight discrete levels of testing were implemented, by Cary J. Wright, pg 85-87

Usable Usability. Usability engineering aims to improve a product’s ease of use by focusing on user needs. “Usable usability” also considers the needs of the product developers, by Peter G. Tighe, pg 88-93

Authors December 1996: Stephen [Steve] W. Hinch, Michael [Mike] J. Karin, Michael [Mike] G. Hart, Christopher [Chris] M. Miller, Randall [Randy] King, Mark [Woody] J. Woodward, Tim L. Bagwell, Donald [Don] L. Faller, Jr., Joseph [Joe] Straznicky, Naily L. Whang, Michael [Mike] M. McTigue, Christopher [Chris] P. Duff, Rin Park, Paul D. Hale, Rajendra [Raj] D. Pendse, Rita N. Horner, Fan [Frankie] Kee Loh, Ram S. Krishnan, Thomas [Tom] J. Lugaresi, Richard Ruh, John [Jack] A. Kusters, Stewart W. Day, Geoffrey [Geoff] H. Nelson, Thomas [Frank] F. Cappellari, John P. Nakulski, John G Fuller, Cary J. Wright, Peter [Pete] G. Tighe, pg 94-98

February 1995 v.46 n.1

Cover: This high-speed fiber-optic polarimeter is used in the HP 8509B polarization analyzer, an instrument that can characterize polarization-mode dispersion problems in long fiber systems.

Broadband Frequency Characterization of Optical Receivers Using Intensity Noise. Methods for enhancing the dynamic range of the intensity noise technique for high-frequency photoreceiver calibration are proposed and experimentally demonstrated. These methods combine recently developed EDFA technology with spectral filtering techniques. The intensity noise calibration technique is portable, easy to use, and field deployable, by Wayne V. Sorin, Douglas M. Baney, pg 6-12

1.55-mm Fiber-Optic Amplifier, pg 9

Erbium-Doped Fiber Amplifier Test System. The HP 81600 Series 200 EDFA test system combines various instruments with powerful software to characterize erbium-doped fiber amplifiers. The system is a turnkey solution with fully specified uncertainty, by Christian Hentschel, Clemens Ruck, Edgar Leckel, Jurgen Sang, Rolf Muller, pg 13-19

Multi-Quantum-Well Ridge Waveguide Lasers for Tunable External-Cavity Sources. A new multi-quantum-well ridge waveguide laser enhanced for use in a grating-tuned external-cavity source has been developed. The device offers higher output power and wider tunability for improved performance in a new instrument. A core technology has been developed for use in a variety of light-emitting devices, by William H. Perez, David M. Braun, Michael J. Ludowise, Tim L. Bagwell, Tirumala R. Ranganath, Dennis J. Derickson, Patricia A. Beck, pg 20-26

Measurement of Polarization-Mode Dispersion. Polarization-mode dispersion is defined and characterized, using Poincare sphere and Jones matrix concepts. Interferometric, wavelength scanning, and Jones matrix eigenanalysis measurement methods are described. Instrumentation, especially the HP 8509B lightwave polarization analyzer, is discussed, by Paul R. Hernday, Brian L. Heffner, pg 27-33

Jones Calculus, pg 28

The Poincare Sphere, pg 29

The HP 8509A/B Lightwave Polarization Analyzer, pg 32

A New Design Approach for a Programmable Optical Attenuator. The new HP 8156A optical attenuator offers improved performance, low polarization dependent loss and polarization-mode dispersion, and increased versatility. It uses a birefrignence-free glass filter disk and a high-resolution, fast-settling filter driver system, by Halmo Fischer, Siegmar Schmidt, pg 34-39

Precision Reflectometer with Spurious-Free Enhanced Sensitivity. The HP 8504B precision reflectrometer has an improved sensitivity of -80 dB at both 1300-nm and 1550-nm wavelengths. All spurious responses generated within the instrument itself have been significantly reduced. The instrument offers fiber-optic component designers and manufacturers the ability to pinpoint both large and small optical reflectances, by Luis M. Fernandez, David M. Braun, Greg D. LeCheminant, Dennis J. Derickson, pg 39-42

High-Power, Low-Internal-Reflection, Edge Emitting Light-Emitting Diodes. A new edge emitting LED has been developed for applications in optical low-coherence reflectrometry. It offers improved sensitivity without introducing spurious responses, by Julie E. Fouquet, Tim L. Bagwell, David M. Braun, Patricia A. Beck, Susan R. Sloan, Dennis J. Derickson, William H. Perez, Gary R. Trott, Forrest G. Kellert, Tirumala R. Ranganath, Michael J. Ludowise, pg 43-48. LEDs, EELED, 8504B.

Jitter Analysis of High-Speed Digital Systems. The HP 71501B jitter and eye diagram analyzer performs industry-standard jitter tolerance, jitter transfer, and jitter generation measurements on Gbit/s telecommunication system components. It can display both the jitter spectrum and the jitter waveform to help determine whether jitter is limiting the bit error ratio of a transmission system, by Christopher M. Miller, David J. McQuate, pg 49-56

Automation of Optical Time-Domain Reflectometry Measurements. The HP 81700 Series 100 remote fiber test system is a first-generation system consisting of a personal computer controlling one or more OTDRs and optical switches. It is well-suited for automated testing of small fiber networks such as company networks, by Harald Seeger, Frank A. Maier, pg 57-62

Design and Performance of a Narrowband VCO at 282 THz. A single-mode optical signal source whose frequency can be voltage-controlled has been developed. We describe its design and performance, by Peter R. Robrish, Rory L.VanTuyl, Christopher J. Madden, William R. Trutna, Jr., pg 63-66

Surface Emitting Laser for Multimode Data Link Applications. A surface emitting laser has been developed for use in a multimode optical fiber data link. The laser can operate in a high-order spatial mode, resulting in a spectral width as wide as one nanometer and a relative intensity noise (RIN) lower than -125 dB/Hz in a multimode fiber system. Electrical and optical characteristics of the surface emitting laser and the epitaxial growth methods are discussed, by Shih-Yuan Wang, Kenneth H. Hahn, Michael R.T. Tan, Yu-Min D. Houng, pg 67-71

Generating Short-Wavelength Light Using a Vertical-Cavity Laser Structure. Second-harmonic generation from a GaAs/AlAs vertical cavity fabricated on a (311)B GaAs substrate has been demonstrated. The experimental results and a theoretical analysis show that a GaAs/AlAs vertical cavity optimized both for efficient confinement of the fundamental power and for quasi-phase-matching can offer efficient second-harmonic generation, by Shigeru Nakagawa, Danny E. Mars, Norihide Yamada, pg 72-75

A New, Flexible Sequencer Architecture for Testing Complex Serial Bit Streams. Based on a generic model of serial communication systems, this architecture dramatically reduces the time needed to program functional and in-circuit tests for devices with serial interfaces. It is implemented in a new Serial Test Card and Serial Test Language for the HP 3070 family of broad test systems, by Christopher B. Cain, James L. Benson, Robert E. McAuliffe, pg 76-90. ATE.

Shortening the Time to Volume Production of High-Performance Standard Cell ASICs. Coding guidelines for behavioral modeling and a process for generating wire load models that satisfy most timing constraints early in the design cycle are some of the techniques used in the design process for standard cell ASICs, by Jay D. McDougal, William E. Young, pg 91-96

A Framework for Insight into the Impact of Interconnect on 0.35-mm VLSI Performance. A design and learning tool called AIM (advanced interconnect modeling) provides VLSI circuit and technology designers with the capability to model, optimize, and scale total delay in the presence of interconnect, by Prasad Raje, pg 97-104

Glossary, pg 97

Synthesis of 100% Delay Fault Testable Combinational Circuits by Cube Partitioning. High-performance systems require rigorous testing for path delay faults. A synthesis algorithm is proposed that produces a 100% path delay fault testable function with a minimal set of test pins, by William K. Lam, pg 105-109

Better Models or Better Algorithms? Techniques to Improve Fault Diagnosis. the simple stuck-at-fault model paired with a complex fault diagnosis algorithm is compared against the bridging fault model paired with a simple fault diagnosis algorithm to determine which approach produces the best fault diagnosis in CMOS VLSI circuits, by Robert C. Aitken, Peter C. Maxwell, pg 110-116

Bridging and Stuck-At Faults, pg 110

Potential Detection, pg 115

Authors February 1995: Douglas [Doug] M. Baney, Wayne V. Sorin, Edgar Leckel, Jurgen Sang, Rolf Muller, Clemens Ruck, Christian Hentschel, Tirumala [Rangu] Ranganath, Michael [Mike] J. Ludowise, William [Bill] H. Perez, Tim L. Bagwell, Brian L. Heffner, Paul R. Hernday, Siegmar Schmidt, Halmo Fischer, David M. Braun, Luis M. Fernandez, Greg D. LeCheminant, Dennis J. Derickson, Patricia [Patti] A. Beck, Julie E. Fouguet, Forrest G. Kellert, Gary R. Trott, Susan R. Sloan, Christopher [Chris] M. Miller, David [Dave] J. McQuate, Frank A. Maier, Harald Seeger, Peter R. Robrish, Christopher [Chris] J. Madden, Rory L. Van Tuyl, William [Rick] R. Trutna, Jr., Michael R. T. Tan, Kenneth H. Hahn, Yu-Min D. Houng, Shih-Yuan [S. Y.] Wang, Shigeru Nakagawa, Danny [Dan] E. Mars, Norihide Yamada, Robert [Bob] E. McAuliffe, James L. Benson, Christopher [Chris] B. Cain, Jay D. McDougal, William E. Young, Prasad Raje, William K. Lam, Robert C. Aiken, Peter C. Maxwell, pg 117-123

April 1995 v.46 n.2

Cover: An artistic rendition of the interconnection between the three main VLSI chips that make up the hardware architecture for the HP 9000 Model 712 workstation. The die photos are for the PA 7100LC processor, the graphics chip and the LASI chip.

A Low-Cost, High-Performance PA-RISC Workstation with Built-In Graphics, Multimedia, and Networking Capabilities. Designing as a set the three VLSI components that provide the core functions of CPU, I/0, and graphics for the HP 9000 Model 712 workstation balanced performance and cost and simplified the interfaces between components, allowing designers to create a system with high performance at a low cost, by Roger A. Pearson, pg 6-11

The PA 7100LC Microprocessor: A Case Study of IC Design Decisions in a Competitive Environment. Engineering design decisions made during the early stages of a product’s development have a critical impact on the product’s cost, time to market, reliability, performance and success, by David W. Quint, William L. Walker, Patrick Knebel, Mick Bass, pg 12-22

Design Methodologies for the PA 7100LC Microprocessor. Product features provided in the PA 7100LC are strongly connected to the methodologies developed to synthesize, place and route, simulate, verify and test the processor chip, by Mick Bass, D. Douglas Josephson, Duncan Weir, Terry W. Blanchard, Daniel L. Halperin, pg 23-35

An I/O System on a Chip. The heart of the I/O subsystem for the HP 9000 Model 712 workstation is a custom VLSI chip that is optimized to minimize the manufacturing cost of the system while maintaining functional compatibility and comparable performance with existing members of the Series 700 family, by Brian K. Arnold, Joseph F. Orth, Curtis R. McAllister, Anthony L. Riccio, Frank J. Lettang, Thomas V. Spencer, pg 36-42

An Integrated Graphics Accelerator for a Low-Cost Multimedia Workstation. Designing with a system focus and extracting as much performance and functionality as possible from available technology results in a highly integrated graphics chip that consumes very little board area and power and is 50% faster and five times less expensive than its predecessor, by Paul Martin, pg 43-50. HP 9000 Model 712.

HP Color Recovery Technology. HP Color Recovery is a technique that brings true color capability to interactive, entry-level graphics devices having only eight color planes, by Anthony C. Barkans, pg 51-59

True Color, pg 52

Real-Time Software MPEG Video Decoder on Multimedia-Enhanced PA 7100LC Processors. With a combination of software and hardware optimizations, including the availability of PA-RISC multimedia instructions, a software video player running on a low-end workstation is able to play MPEG compressed video at 30 frames/s, by John P. Beck, Joel Lamb, Ruby B. Lee, Kenneth E. Severson, pg 60-68

Overview of the Implementation of the PA 71000LC Multimedia Enhancements, pg 66-67

HP TeleShare: Integrating Telephone Capabilities on a Computer Workstation. Using off-the-shelf parts and a special interface ASIC, an I/0 card was developed that provides voice, fax, and data transfer via a telephone line for the HP 9000 Model 712 workstation, by S. Paul Tucker, pg 69-74

Call Progress, DTMF Tones, and Tone Detection, pg 73

Product Design of the Model 712 Workstation and External Peripherals. A product design without fasteners and the use of environmentally friendly materials and low-cost parts with integrated functions provides excellent manufacturability, customer ease of use, and product stewardship, by Arlen L. Roesner, pg 75-78

Development of a Low-Cost, High-Performance, Multiuser Business Server System. Using leveraged technology, an aggressive system team, and clearly emphasized priorities, several versions of low-end multiuser systems were developed in record time while dramatically improving the product’s availability to customers, by Karen L. Murillo, Dennis A. Bowers, Gerard M. Enkerlin, pg 79-84. HP 9000 Series 800 Model Ex5, HP 3000 Series 9×8.

HP Distributed Smalltalk: A Tool for Developing Distributed Applications. An easy-to-use object-oriented development environment is provided that facilitates the rapid development and deployment of multiuser, enterprise-wide distributed applications, by Eileen Keremitsis, Ian J. Fuller, pg 85-92

A Software Solution Broker for Technical Consultants. A distributed client-server system gives HP’s worldwide technical consultants easy access to the latest HP and non-HP software products and tools for customer demonstrations and prototyping, by Manny Yousefi, Wulf Rehder, Adel Ghoneimy, pg 93-101

HP Software Solution Broker Accessible Products, pg 98

Bugs in Black and White: Imaging IC Logic Levels with Voltage Contrast. Voltage contrast imaging allows visual tracking of logical level problems to their source on operating integrated circuits, using a scanning electron microscope. This paper presents an overview of voltage contrast and the methods developed to image the failure of dynamic circuits in the floating-point coprocessor of the HP PA 7100LC processor chip, by Jack D. Benzel, pg 102-106

Component and System Level Design-for-Testability Features Implemented in a Family of Workstation Products. Faced with testing over twenty new ASIC components going into four different workstations and multiuser computer models, designers formed a team that developed a common system-level design-for-testability (DFT) architecture so that subsystem parts could be shared without affecting the manufacturing test flow, by Michael Ricchetti, Bulent I. Dervisoglu, pg 107-113

Authors April 1995: Roger A. Pearson, Mick Bass, Patrick Knebel, David W. Quint, William [Will] L. Walker, Terry W. Blanchard, D. Douglas [Doug] Josephson, Duncan Weir, Daniel [Dan] L. Halperin, Thomas [Tom] V. Spencer, Frank J. Lettang, Curtis R. McAlister, Anthony L. Riccio, Joseph [Joe] F. Orth, Brian K. Arnold, Paul Martin, Anthony [Tony] C. Barkans, Ruby B. Lee, John P. Beck, Joel Lamb, Kenneth [Ken] E. Severson, S. Paul Tucker, Arlen L. Roesner, Dennis A. Bowers, Gerard M. Enkerlin, Karen L. Murillo, Eileen Keremitsis, Ian J. Fuller, Manny Yousefi, Adel Ghoneimy, Wulf Rehder, Jack D. Benzel, Bulent I. Dervisoglu, Michael [Mike] Ricchetti, pg 114-118

June 1995 v.46 n.3

Cover: Heating a fused silica capillary in preparation for blowing a bubble in the capillary to improve detection sensitivity in capillary electrophoresis.

Capillary Electrophoresis: A Product of Technological Fusion. An introduction to capillary electrophoresis (CE), its different forms, and its applications, and the history of CE research at HP, leading to the new HP CE instrument described in this issue, by Robert R. Holloway, pg 6-9

A New High-Performance Capillary Electrophoresis Instrument. This instrument automates the CE separation process with high reproducibility of analytical results such as peak areas and migration times. A diode array detector with an optimized optical path including a new extended lightpath capillary provides spectral information with high detection sensitivity. The liquid handling and sample injection systems are designed for flexibility and usability, by Fred Strohmeiery, pg 10-19. G1600A.

Capillary Electrophoresis Applications, by Martin L. Verhoef, pg 12-13

HP CE Technology Transfer, by Alfred Maute, pg 16

Industrial Design of the HP CE Instrument, by Raoul Dinter, pg 18-19

A High-Sensitivity Diode Array Detector for On-Column Detection in Capillary Electrophoresis. The small peak volumes in CE demand special optical design to maximize sensitivity. High light throughput, good stray light suppression, and precise alignment are necessary. The diode array detector design focused on good matching of the illumination system and the spectrometer, precise alignment of the capillary and optical elements, and mechanical and thermal stability, by Patrick Kaltenbach, pg 20-24. HP CE.

Capillary Handling in the HP Capillary Electrophoresis Instrument. Capillaries are encased in cassettes for easy replacement and connections are made automatically when a cassette is installed. Air cooling of the capillary eliminates leak problems and lower costs. Vials containing samples and electrolyte are automatically lifted from a tray to either end of the capillary, by Hans-Peter Zimmermann, pg 25-31. HP CE.

Rapid Prototyping for the HP CE Project, by Martin Bauerle, pg 28-29

Sample Injection in HP CE. For flushing or conditioning the capillary or injecting a sample, air pressures or different values and durations are applied. The injection system provides precise closed-loop control of the integral of the air pressure over time for either direction of fluid flow. The replenishment system automates the exchange of used electrolytes for fresh ones, using a special double-needle design, by Werner Schneider, pg 32-35

HP CE Separation Control Electronics and Firmware. The HP CE instrument consists of a PC and a base unit consisting of detection and separation subunits. Methods are developed on the PC and downloaded to the base unit for independent execution. The control electronics and firmware of the separation subunit takes care of tray and vial movement, capillary voltage, current and power control, capillary temperature control, diagnostics, and related data capture, by Franz Bertsch, Klaus Witt, Fritz Bek, pg 36-43

A User Interface for Capillary Electrophoresis. The graphical user interface of the HP CE instrument is designed to be easily understood by users familiar with other separation methods but new to CE. It provides for method programming and simulation and for visualization of the status of the instrument and the running analysis, by Klaus Witt, Alwin Ritzmann, pg 44-49. ChemStation.

Development of a Common ChemStation Architecture, by Herbert Wiederoder, pg 46

Reproducibility Testing of the HP CE Instrument. The final chemical test developed for the HP CE instrument implicitly checks various instrument functions by determining the reproducibility of migration time and peak area measurements for well-defined chemical samples. The injection type was selected by testing four different types in a series of reproducibility tests. The final test can be used in production, at a customer site, or for teaching CE classes, by Ulrike Jegle, pg 50-56

The Impact of Column Technology on Protein Analysis by Capillary Electrophoresis: Surface Coatings and Analytical Approaches for Assessment. To avoid unwanted interactions between proteins being analyzed and the surface of the fused silica CE capillary, the surface must be deactivated. Four approaches to surface deactivation for protein analysis are presented. A method for determining the extent of protein absorption is discussed, by Monika Dittmann, Sally A. Swedberg, pg 57-61

A New High-Sensitivity Capillary Electrophoresis Detector Cell and Advanced Manufacturing Paradigm. By circumventing laminar flow while expanding the cross section of the analyte, this detector cell greatly increases both the sensitivity and the linearity of capillary electrophoresis. Manufacturing is made feasible by an advanced computer-controlled miniature lathe using machine vision, by Richard P. Tella, Gary B. Gordon, Henrique A. S. Martins, pg 62-70

HP Disk Array: Mass Storage Fault Tolerance for PC Servers. In the process of offering a new technology to the marketplace the expertise of the user is often not considered. The HP Disk Array offers RAID technology with special installation and configuration features tailored for ease of use, by Tom A. Skeie, Michael R. Rusnack, pg 71-81

An Overview of Raid Technology, pg 74

COBOL SoftBench: An Open Integrated CASE Environment. With the aid of a mouse and a menu-driven interface, COBOL programmers new to the UNIX operating system can improve their productivity with a tightly integrated toolset that includes an editor, compiler, debugger, profiler, and other software development tools, by Cheryl Carmichael, pg 82-87

Development and Use of Electronic Schematic Capture in the Specification and Simulation of a Structured-Custom ASIC. ASIC designers must sometimes provide the ASIC vendor with documentation describing the data path of the chip and its relationship to the control portion. This paper describes a method and attendant tools that facilitate the employment of commonly available electronic schematic capture software to ensure that the documentation given to the ASIC vendor always matches the Verilog HDL descriptions used by the ASIC designers for simulation, by David A. Burgoon, pg 88-91

Design and Development of a 120-MHz Bus Interface Block Using Standard Cells and Automatic Place and Route Tools. The RW_IO block runs at 120 MHz and interfaces the master memory controller chip’s 60-MHz core with the 120-MHz processor bus drivers. A design approach using standard cells, automatic place and route tools, and a powerful database management and build tool was used to construct the RW_IO block. This approach was chosen over a full custom or data-path solution because of its reduced risk and the flexibility of the design tools, by Robert E. Ryan, pg 92-95

Authors June 1995: Robert [Bob] R. Holloway, Fred Strohmeier, Patrick Kaltenbach, Hans-Peter Zimmermann, Werner Schneider, Fritz Bek, Franz Bertsch, Klaus Witt, Alwin Ritzmann, Ulrike Jegle, Sally A. Swedberg, Monika Dittmann, Gary B. Gordon, Richard [Rich] P. Tella, Henrique A. S. Martins, Tom A. Skeie, Michael R. Rusnack, Cheryl Carmichael, David [Dave] A. Burgoon, Robert [Bob] E. Ryan, pg 96-98

August 1995 v.46 n.4

Cover: Time-critical applications are represented as brightly colored data packets as opposed to the blue normal-priority data

Introduction to 100VG-AnyLAN and the IEEE 802.12 Local Area Network Standard. 100VG-AnyLAN provides a 100-Mbit/s data rate with guaranteed bandwidth and maximum access delay for time-critical applications such as multimedia, using existing building wiring. It uses demand priority protocol. Developed by Hewlett-Packard and now supported by over 30 companies ranging from integrated circuit vendors to systems suppliers, demand priority is well on its way to becoming the IEEE 802.12 standard, by Alan R. Albrecht, Patricia A. Thaler, pg 6-12. AdvanceStack.

Cable Types, pg 7

Other Network Technologies, pg 10

Demand Priority Protocol. In multiple-hub networks, demand priority ensures fairness of access for all nodes and guarantees access time for multimedia applications, by Alan R. Albrecht, Michael P. Spratt, Patricia A. Thaler, Gregory C. A. Watson, pg 13-17. IEEE 802.12, 100VG-AnyLAN.

Network Protocol Layers, pg 15

Physical Signaling in 100VG-AnyLAN. A physical layer has been developed for demand priority local area networks that accommodates different cable types by means of different physical medium dependent (PMD) sublayers. The major goal was to provide 100-Mbit/s transmission on existing cables, including Category 3, 4 and 5 UTP, STP, and multimode optical fiber, by Alistair N. Coles, David G. Cunningham, Steven G. Methley, Daniel J. Dove, Joseph A. Curcio, Jr., pg 18-26

Cross Talk in Unshielded Twisted-Pair Cables, pg 19-20

Multilevel Signaling, pg 21

Cross Talk Analysis, pg 22

Optical-Fiber Links for 100VG-AnyLAN, by Del Hanson, pg 26

Coding in 100VG-AnyLAN. A 5B/6B coding scheme in which five data bits are encoded into six-bit codewords is used in conjunction with offsetting the data on different channels by three bits in quartet signaling. It provides the level of error detection necessary, produces a signal balanced within narrow limits, and restricts strings of consecutive Os or 1s to a maximum length of 6. It is also efficient, by Jonathan Jedwab, Simon E.C. Crouch, pg 27-32

IEEE 802.3 and 802.5 Frame Formats, pg 30

Polynomial Arithmetic and Cyclic Redundancy Checks, pg 31

Multimedia Applications and 100VG-AnyLAN. Networks must guarantee bandwidth for multimedia traffic and must control end-to-end delay and delay jitter (fluctuation in the arrival time of packets). The new campus network, 100VG-AnyLAN, can meet these requirements in many circumstances through the basic operation of the protocol. More flexibility can be obtained through the use of bandwidth allocators and the target transmission time protocol. Until either the Broadband Integrated Services Digital Network (B-ISDN) or reliable Internet protocols become available, the use of dial-up remote bridges with existing WANs can accommodate multimedia traffic in the near term, by Michael P. Spratt, John R. Grinham, pg 33-38

Remote Bridge Example, pg 35

Higher-Level Protocols, pg 36

Related Projects, pg 38

100VG-AnyLAN 15-Port Hub Design. Much of the intelligence and uniqueness of a 100VG-AnyLAN network is concentrated in the hub. Special repeater, transceiver, and end node chips implement the functionality of the HP J2410A AdvanceStack 100VG Hub 15, by Lisa S. Brown, pg 39-42

Invalid Packet Marker, pg 41

HP AccuPage 2.0: A Toolkit for High-Quality Document Scanning. Working with commercially available OCR programs, the image processing transforms used in HP AccuPage 2.0 improve the accuracy of converting scanned images from a variety of documents to editable text and pictures at the same time, by Steven G. Henry, Steven L. Webb, George Prokop, Kevin S. Burke, pg 43-50. Scanners, Optical Character Recognition.

Glossary, pg 45

An 11.8-in Flat Panel Display Monitor. The HP S1010A flat panel display is designed to be a plug-compatible replacement for CRTs used with HP workstations. This compatibility is provided by an interface board that uses the same analog signals that drive the CRTs to create digital signals to drive a high-resolution, high-performance LCD color display, by Tom J. Searby, Bradly J. Foster, Steven J. Kommrusch, David J. Hodge, pg 51-60

Liquid Crystal Display Technology, pg 53

Product Design of the HP S1010A Flat Panel Display, pg 57-58

A Note About VRAMs, pg 59

Applying an Improved Economic Model to Software Buy-versus-Build Decisions. The decision to buy or build software is a business decision that should be made using a sound economic model. A comprehensive economic model has been developed and applied to actual and estimated data to compare the costs of using a third-party software package to the costs of internal development, by Wesley H. Higaki, pg 61-65

Benchmark Standards for ASIC Technology Evaluation. Two benchmark circuits are used for objectively evaluating ASIC supplier performance claims. The method applies first-order equations relating capacitive discharge currents and transistor saturation current to arrive at a technology constant. The method has been used to survey 14 ASIC suppliers with over 76 different technologies. Results are shown for 48 CMOS technologies, by Aloke S. Bhandia, Henry H. W. Lie, Antonio A. Martinez, pg 66-70

Authors August 1995: Alan R. Albrecht, Patricia [Pat] A. Thaler, Michael P. Spratt, Gregory [Greg] C. A. Watson, Alistair N. Coles, David G. Cunningham, Joseph [Joe] A. Curcio, Jr., Daniel [Dan] J. Dove, Steven G. Methley, Simon E. C. Crouch, Jonathan Jedwab, John R. Grinham, Lisa S. Brown, Steve Webb, Steven [Steve] G. Henry, Kevin S. Burke, George Prokop, David [Dave] J. Hodge, Bradly [Brad] J. Foster, Steven [Steve] J. Kommrusch, Tom J. Searby, Wesley [Wes] H. Higaki, Antonio A. Martinez, Aloke S. Bhandia, Henry H. W. Lie, pg 71-74

October 1995 v.46 n.5

Cover: A solid model created and displayed using the HP Precision Engineering SolidDesigner 3D solid modeling system

HP PE/SolidDesigner: Dynamic Modeling for Three-Dimensional Computer-Aided Design. In most solid modeling CAD systems, knowledge of the history of the design is necessary to avoid unanticipated side-effects when making changes. With dynamic modeling, local geometry and topology changes can be made independently of the model creation at any time, using both direct and dimension-driven methods. The core components enabling dynamic modifications are the tool body and the relation solver, by Klaus-Peter Fahlbusch, Thomas D. Roser, pg 6-13. Precision Engineering Systems, 3D.

User Interaction in HP PE/SolidDesigner. The HP PE/SolidDesigner user interface is modeled after the successful, easy-to-use, easy-to-learn interface of earlier HP CAD products. All commands are coded as Common Lisp action routines. A user interface builder helps command programmers by hiding details of the X Window System and the OSF/Motifä graphical user interface. Prototyping was done using a specially developed Lisp-based interface to OSF/Motif called HLCX, by Markus Kuhl, Berthold Hug, Gerhard J.Walz, pg 14-23

Enhancements in Blending Algorithms. This article describes a rounding operation for a 3D CAD boundary representation (B-Rep) solid model. Complex combinations of convex and concave edges are handled predictably and reliably. At vertices the surfaces are smoothly connected by one or more surface patches. An algorithm for the creation of blending surfaces and their integration into the model is outlined. The sequence of topological modifications applied to the solid model is illustrated by examples including some special case handling, by Stefan Freitag, Karsten Opitz, pg 24-34

Open Data Exchange with HP PE/SolidDesigner. Surface and solid data can be imported from HP PE/ME30 and exchanged with systems supporting the IGES, STEP, and ACIS formats. Imported data coexists with and can be manipulated like native data, by Wolfgang Klemm, Gerhard J. Walz, Peter J. Schild, Hermann J. Ruess, pg 35-50

Providing CAD Object Management Services through a Base Class Library. HP PE/SolidDesigner’s data structure manager makes it possible to save a complex 3D solid model and load it from file systems and databases. Using the concepts of transactions and bulletin boards, it keeps track of changes to a model, implements an undo operation, and notifies external applications of changes, by Claus Brod, Max R. Kublin, pg 51-60

Exception Handling and Development Support, pg 55

Freeform Surface Modeling. There are two methods for creating freeform surfaces in HP PE/SolidDesigner: blending and lofting. This article describes the basics of lofting. The geometry engine, which implements the lofting functionality, uses a single-data-type implementation for its geometric interface, but takes a multiple-data-type, hybrid approach internally, by Michael Metzger, Sabine Eismann, pg 61-68

Common Lisp as an Embedded Extension Language. A large part of HP PE/SolidDesigner’s user interface is written in Common Lisp. Common Lisp is also used as a user-accessible extension language, by Jens Kilian, Heinz-Peter Arndt, pg 69-73. PE/ME10, PE/ME30, CAD.

Boolean Set Operations with Solid Models. The Boolean engine of HP PE/SolidDesigner applies standard and nonstandard Boolean set operations to solid models to perform an impressive variety of machining operations. Parallel calculation boosts performance, especially with multiprocessor hardware, by Peter H. Ernst, pg 74-79

Fighting Inaccuracies: Using Perturbation to Make Boolean Operations Robust, pg 78-79

A Microwave Receiver for Wide-Bandwidth Signals. The HP 71910A wide-bandwidth receiver extends modular spectrum analyzer operation for more effective measurements on modern communications and radar signals, by Robert J. Armantrout, pg 80-88

Firmware Design for Wide-Bandwidth IF Support and Improved Measurement Speed, by Thomas A. Rice, pg 84-85

The HP 89400 Series Vector Signal Analyzers, by Robert T. Cutler, pg 87

An IF Module for Wide-Bandwidth Signals. The HP 70911A IF module provides the HP 71910A receiver with wideband demodulation and variable bandwidths up to 100 MHz, while maintaining the gain accuracy of a spectrum analyzer, by Leonard M. Weber, Terrence R. Noe, Christopher E. Stewart, and Robert J. Armantrout, pg 89-103

The Log Weighted Average for Measuring Printer Throughput. The log weighted average balances the different time scales of various plots in a test suite. It prevents an overemphasis on plots that take a long time to print and allows adjustments according to the expected user profile weighting. It is based on percentage changes rather than absolute plot times, by John J. Cassidy, Jr., pg 104-106. DeskJet 1600C.

Authors October 1995: Klaus-Peter Fahlbusch, Thomas D. Roser, Berthold Hug, Gerhard J. Walz, Markus Kuhl, Stefan Freitag, Karsten Opitz, Peter J. Schild, Wolfgang Klemm, Hermann J. Ruess, Claus Brod, Max R. Kublin, Michael Metzger, Sabine Eismann, Jens Kilian, Heinz-Peter Arndt, Peter H. Ernst, Robert [Bob] J. Armantrout, Terrence [Terry] R. Noe, Christopher [Chris] E. Stewart, Leonard M. Weber, John [Jack] J. Cassidy, Jr., pg 107-110

December 1995 v.46 n.6

Cover: A highly internetworked distributed computing environment made up of clients and servers is shown in the background. In the foreground is the software architecture for one pair of client and server systems.

DCE: An Environment for Secure Client/Server Computing. The Open Software Foundation’s Distributed Computing Environment provides an infrastructure for developing and executing secure client/server applications that are portable and interoperable over a wide range of computers and networks, by Michael M. Kong, pg 6-15

Adopting DCE Technology for Developing Client/Server Applications. HP’s information technology community has adopted DCE as the infrastructure for developing client/server information technology applications. The team developing the DCE service has discovered that putting an infrastructure like DCE in place in a legacy environment is more than just technology and architecture, by Samuel D. Horowitz, Paul Lloyd, pg 16-22

DCE Directory Services. The DCE directory services provide access for applications and users to a federation of naming systems at the global, enterprise and application levels, by David Truong, Michael M. Kong, pg 23-27

X/Open Federated Naming. The X/Open Federated Naming (XFN) specification defines uniform naming interfaces for accessing a variety of naming systems. XFN specifies a syntax for composite names, which are names that span multiple naming systems, and provides operations to join existing naming systems together into a relatively seamless naming federation, by Elizabeth A. Martin, pg 28-33

HP Integrated Login. HP Integrated Login coordinates the use of security systems and improves the usability of computer systems running the HP-UX operating system, by Navaneet Kumar, Lawrence J. Rose, Jane B. Marcus, pg 34-40

The DCE Security Service. A security protocol consisting of encryption keys, authentication credentials, tickets, and user passwords is used to provide secure transmission of information between two transacting parties in a DCE client/server enterprise, by Frederic Gittler, Anne C. Hopkins, pg 41-48

Glossary, pg 42

An Evolution of DCE Authorization Services. One of the strengths of the Open Software Foundation’s Distributed Computing Environment is that it allows developers to consider authentication, authorization, privacy, and integrity early in the design of a client/server application. The HP implementation evolves what DCE offers to make it easier for server developers to use, by Deborah L. Caswell, pg 49-54

An Object-Oriented Application Framework for DCE-Based Systems. Using the Interface Definition Language compiler and the C++ class library, the HP OODCE product provides objects and abstractions that support the DCE model and facilitate the development of object-oriented distributed applications, by Luis M. Maldonado, Mihaela C. Gittler, Michael Z. Luo, pg 55-60

Glossary, pg 60

HP Encina/9000: Middleware for Constructing Transaction Processing Applications. A transaction processing monitor for distributed transaction processing applications maintains the ACID (Atomicity, consistency, isolation and durability) properties of the transactions and provides recovery facilities for aborting transactions and recovering from system or network failures, by Pankaj Gupta, pg 61-74

Glossary, pg 65

Object-Oriented Perspective on Software System Testing in a Distributed Environment. A flexible object-oriented test system was developed to deal with the testing challenges imposed by software systems that run in distributed client/server environments, by Stephen J. McFarland, David S. Levin, Mark C. Campbell, J. Scott Southworth, Ana V. Kapetanakis, David J. Miller, David K. Hinds, pg 75-81

The Object Management Group’s Distributed Object Model, pg 76

Object-Oriented Programming, pg 79

A New, Lightweight Fetal Telemetry System. The HP Series 50 T fetal telemetry system combines both external and internal monitoring of the fetus in a small, lightweight transmitter that is easy and comfortable for the patient to carry. It is useful for monitoring in labor, monitoring of high-risk patients, monitoring in transit, antepartum nonstress testing, and monitoring in the bath, by Jurgen W. Hausmann, Michelle Houghton Jagger, Andreas Boos, Gunter W. Paret, pg 82-93

Zero Bias Detector Diodes for the RF/ID Market. Hewlett Packard’s newest silicon detector diodes were developed to meet the requirements for receiver service in radio frequency identification tags. These requirements include portability, small size, long life, and low cost, by Rolando R. Buted, pg 94-98

Backscatter RF/ID Systems, pg 95

Authors December 1995: Michael [Mike] J. Kong, Paul Lloyd, Samuel [Sam] D. Horowitz, David T. Truong, Elizabeth [Liza] A. Martin, Jane B. Marcus, Navaneet Kumar, Lawrence [Larry] J. Rose, Frederic Gittler, Anne C. Hopkins, Deborah [Debbie] L. Caswell, Mihaela [Mickey] C. Gittler, Michael Zhijing Luo, Luis M. Maldonado III, Pankaj Gupta, Mark [Marcus] C. Campbell, David K. Hinds, Ana V. Kapetanakis, Stephen [Steve] J. McFarland, David S. Levin, David [Dave] J. Miller, J. Scott Southworth, Andreas Boos, Michelle Houghton Jagger, Gunter W. Paret, Jurgen W. Hausmann, Rolando R. Buted, pg 99-102

Index: Volume 46 January 1995 through December 1995. PART 1: Chronological Index, pg 103-104. PART 2: Subject Index, pg 105-110. PART 3: Product Index, pg 111. PART 4: Author Index, pg 111-112

February 1994 v.45 n.1

Cover: The business end of an HP DeskJet 1200C print cartridge, showing the 104-nozzle orifice plate. The backdrop, printed by the DeskJet 1200C printer, shows the vivid colors available.

High-Quality Color Inkjet Office Printers. The HP DeskJet 1200C and 1200C/PS printers are a new class of HP DeskJet printers for office applications. They offer black and color printing, fast print speeds, scalable typefaces, expandable memory, networking options, PCL 5 and PostScriptä languages, and HP LaserJet printer compatibility, by Douglas R. Watson, Hatem E. Mostafa, pg 6-8

Laser-Comparable Inkjet Text Printing. The HP DeskJet 1200C printer achieves laser quality by means of pigmented black ink and precise, mode dependent control of drop volume. Contributing to laser printing speed are an intelligent print mode forecaster, a large memory capacity, heated drying, improved media handling, a larger printhead, and a high firing rate made possible by careful attention to refill dynamics, by Jaime H. Bohorquez, Brian P. Canfield, Kenneth J. Courian, Frank Drogo, Corrina A.E. Hall, Clayton L. Holstun, Aneesa R. Scandalis, Michele E. Shepard, pg 9-17

An Inside View of the Drop Generation Process, by Brian P. Canfield, pg 11

Modifying Office Papers to Improve Inkjet Print Quality, by David W. Brooks, pg 16-17

High-Quality Inkjet Color Graphics Performance on Plain Paper. Realizing the color graphics performance of the HP DeskJet 1200C printer required simultaneous optimization of many interacting parameters of the ink and the architecture to deliver significant improvements in print quality, color gamut, throughput, and cost per copy, by Catherine B. Hunt, Ronald A. Askeland, Leonard Slevin, Keshava A. Prasad, pg 18-27

Polyester Media Development for Inkjet Printers. A discussion of the mechanisms and ink/printer/media interactions that must be considered in the design of special media for a printer system, and of the methods available for optimizing them, by Daniel L. Briley, pg 28-34

Inkjet Printer Print Quality Enhancement Techniques. Five print modes, each optimized for quality and throughput, HP Resolution Enhancement technology, heaters to dry the ink and the paper, and accurate print cartridge alignment and paper advance schemes contribute to the high print quality of the HP DeskJet 1200C printer, by Corinna A.E. Hall, Aneesa R. Scandalis, Damon W. Broder, Shelley I. Moore, Reza Movaghar, W. Wistar Rhoads, William H. Schweibert, pg 35-40

The Third-Generation HP Thermal InkJet Printhead. The monolithic integration of driver transistors with the thermal inkjet heater resistors leads to vastly improved performance with reduced cost per page for the customer, by J. Stephen Aden, Jaime H. Bohorquez, Douglas M. Collins, M. Douglas Crook, Andre Garcia, Ulrich E. Hess, pg 41-45. DeskJet 1200C.

Development of the HP DeskJet 1200C Print Cartridge Platform. The platform includes all of the parts of the print cartridge except the printhead assembly and ink. It is designed to accept different printheads and inks to support different print applications. It features a slim form factor, a spring-bag ink reservoir, and an ink level indicator, by The Platform Development Team (Carol Beamer, Tim Carlin, George Kaplinsky, Steve Bauer, Dustin Blair, Hendrick Brower, Erich Coiner, Mindy Hamlin, Dave Hunt, Rob Little, Tony Panah, Bruce Reid, Joe Scheffelin, Jeff Thoman, Dale Timm, Amy Van Liew), pg 46-54

Print Cartridges for a Large-Format Color Inkjet Drafting Plotter, by Jaime H. Bohroquez, Scott W. Hock, Susan H. Tousi, David Towery, pg 50-51

Environmentally Friendly Packaging, by Debbie R.B. Hockley, pg 53

HP DeskJet 1200C Printer Architecture. The product architecture of the HP DeskJet 1200C printer – mechanical, electrical, and firmware – played a key role in addressing the technical challenges demanded by the office color printer market, by Kevin M. Bockman, Anton Tabar, Erol Erturk, Robert R. Giles, William H. Schwiebert, pg 55-66

CAD System Organization, by Robert Giles, pg 56

Product Design Effect on Environmental Responsibility and Distribution Costs, by Donald Clugston, pg 59

A New Product Development Model, by Anton Tabar, Kevin Bockman, pg 65

Print Cartridge Fixturing and Maintenance in the HP DeskJet 1200C Printer. The carriage assembly locates and transports the four print cartridges precisely. The service station provides capping, wiping, and priming functions for print cartridge maintenance and recovery, by Michael T. Dangelo, Reza Movaghar, Arthur K. Wilson, pg 67-71

Media Path for a Small, Low-Cost Color Thermal Inkjet Printer. The DeskJet 1200C media path is heated for media independence, requiring development of a new grit drive roller and pinch wheel combination. A new stepper motor was developed to attain the target speed and accuracy. Media flatteners and precise gearing with an antibacklash device contribute to accuracy, by Damon W. Broder, David C. Burney, Shelley I. Moore, Stephen B. Witte, pg 72-78

Stepper Motor Simulation Model, by Stephen B. Witte, pg 75

Automated Assembly and Testing of HP DeskJet 1200C Print Cartridges. The assembly system is flexible and modular. A performance monitor collects data for quality control. A standardized print engine is used in several applications, by William S. Colburn, Randell A. Agadoni, Michael M. Johnson, Edward Wiesmeier III, Glen Oldenburg, pg 79-84

Connectivity of the HP DeskJet 1200C Printer. The connectivity components include the language firmware, a language interface to the mechanical firmware, software printer drivers, and tools for various environments and for driver developers. A screen calibrator tool enlists the user’s help in making the printed output match the screen, by Anthony D. Parkhurst, Ramchandran Padmanabhan, Steven D. Mueller, Kirt A. Winter, pg 85-97

Authors February 1994: Douglas [Doug] R. Watson, Hatem E. Mostafa, Jaime [Jim] H. Bohorquez, Brian P. Canfield, Kenneth [Ken] Courian, Frank Drogo, Clayton L. Holstun, Michele E. Shepard, Catherine B. Hunt, Ronald [Ron] A. Askeland, Leonard [Len] Slevin, Keshava [Kesh] A. Prasad, Daniel [Dan] L. Briley, Corrina A. E. Hall, Aneesa R. Scandalis, W. Wistar Rhoads, J. Stephen [Steve] Aden, Douglas [Doug] M. Collins, M. Douglas [Doug] Crook, Andre Garcia, Ulrich E. Hess, Kevin M. Bockman, Anton [Tony] Tabar, Erol Erturk, Robert [Bob] R. Giles, William [Bill] H. Schwiebert, Michael [Mike] T. Dangelo, Reza Movaghar, Arthur [Art] K. Wilson, Damon W. Broder, David [Dave] C. Burney, Shelley I. Moore, Stephen [Steve] B. Witte, William [Bill] S. Colburn, Randell [Randy] A. Agadoni, Michael [Mike] M. Johnson, Edward [Ed] Wiesmeier III, Glen Oldenburg, Anthony [Tony] D. Parkhurst, Ramchandran [Paddy] Padmanabhan, Steven D. Mueller, Kirt A. Winter, pg 98-103

April 1994 v.45 n.2

Cover: A workstation screen showing the HP MPower media panel and the HP MPower applications Image-View, which provides capabilities for manipulating and viewing different types of images, MailEditor for creating multimedia email and Whiteboard, which enables two or more user to collaborate on the same image from different workstations.

Development of a Multimedia Product for HP Workstations. Providing multimedia capability on HP’s workstations was an evolutionary process that was paced according to customer needs and the availability of quality multimedia hardware and software technology and low-cost workstations, by Gary P. Rose, Jeffery T. Oesterle, Joseph E. Kasper, Robert J. Hammond, pg 6-9. MPower.

HP MPower: A Collaborative Multimedia Environment. Multimedia capability on a workstation enables users to interact with their applications and communicate with others in a variety of formats (textual and nontextual). HP MPower provides an environment in which users have easy access to the multimedia facilities at their workstations, and application developers can easily add new multimedia tools, by William R. Yoder, pg 10-19

X Stations in HP MPower, pg 16

The HP Instant Ignition Program, by Sue Magenis, pg 17

Diagnosing and Reporting Problems in the Multimedia Environment, by John V. Peterson, pg 18

A Graphical User Interface for a Multimedia Environment. The HP Visual User Environment, or HP VUE, provides not only a friendly user interface to the HP-UX operating system but also a framework for the HP MPower system, by Charles V. Fernandez, pg 20-22

HP SharedX: A Tool for Real-Time Collaboration. With this real-time communication product, two or more remote users can share and interact with the same X-protocol-based applications from their workstations. Windows are shared in such way that it almost seems as if all the participants in the shared session are sitting at the same workstation, running the same application, by Daniel Garfinkel, Bruce C. Welti, Thomas W. Yip, pg 23-36. X Window.

X Window System Client/Server Architecture, pg 25

Graphics Glossary, pg 26

Whiteboard: A New Component of HP SharedX, pg 28-29

Imaging Services in a Multimedia Environment. Image manipulation tools, compression and decompression functions, picture quality adjustment techniques, and support for industry standards are some of the features included in the HP Image Library, by Andrew Munro, Ahmad H. Shekarabi, pg 37-43

HP Image Library Scaling Functions, pg 41

A Printing Solution for a Multimedia Environment. For environments in which users are confronted with a myriad of printers to choose from, HP SharedPrint provides a simple graphical interface that enables users to select a target printer and a set of options without encountering the typical problems associated with this process, by John Mandler, pg 44-52

Faxing Documents in HP MPower. The ability to transmit documents via standard telephone lines is greatly enhanced with the HP MPower fax utility which provides automatic dialing, transmission, and delivery of fax documents from a workstation, by Francis P. Sung, Mark A. Johnson, pg 53-61

Audio Support in HP MPower. Multimedia capability promises to enhance the communication and presentation of information through the use of real-world data types such as audio and video. Compact-disk-quality audio is the first of such data types to be offered as a standard feature on all of HP’s new workstations, by Ellen N. Brandt, Thomas G. Fincher, Monish S. Shah, pg 62-67

Overview of A-law and m-law Data Formats, pg 65

Video Support in a Multimedia Environment. Combining video with the computing power of a workstation adds an extra level of interpretation, detail, and perception to information seen and manipulated on a workstation desktop, by Craig S. Richard, pg 68-70. VideoLive, MPower.

Mail Facilities in a Multimedia Environment. Providing a multimedia email facility required that the well-established processes of creating, sending, receiving, printing, and replying to email messages be maintained and applied to messages containing multimedia objects, by Robert B. Williams, Harry K. Phinney, Kenneth L. Steege, pg 71-78. MPower.

MIME Header Fields, pg 76

A Fast and Intuitive Online Help System. The HP Help System provides application developers with the tools to create and integrate rich online help information into their OSF/Motif-based applications, by Michael R. Wilson, Lori A. Cook, Steven P. Hiebert, pg 79-89. HP VUE, MPower.

WYSIWYG Printing in an X Application, by Axel Deininger, pg 86-87

Developing Online Application Help. The primary goal for an application help system is to provide the capability for the end user to get useful help information and get back on task as quickly and successfully as possible, by Dex Smith, pg 90-95. MPower.

Authors April 1994: Gary P. Rose, Jeffery [Jeff] T. Oesterle, Joseph [Joe] E. Kasper, Robert [Bob] J. Hammond, William [Bill] R. Yoder, Charles [Charlie] V. Fernandez, Daniel [Dan] Garfinkel, Bruce C. Welti, Thomas [Tom] W. Yip, Andrew [Andy] F. Munro, Ahmad H. Shekarabi, John Mandler, Francis P. Sung, Mark A. Johnson, Ellen Nordahl Brandt, Thomas [Tom] G. Fincher, Monish S. Shah, Craig S. Richard, Robert B. Williams, Henry [Harry] K. Phinney, Kenneth [Ken] L. Steege, Michael [Mike] R. Wilson, Lori A. Cook, Steven [Steve] P. Hiebert, Dex Smith, pg 96-99

June 1994 v.45 n.3

Cover: The processor board designed for the new high-end HP corporate business server has up to two processor modules based on PA 7100 superscalar PA-RISC chips

Corporate Business Servers: An Alternative to Mainframes for Business Computing. With expandable hardware, PA-RISC architecture, symmetric multi-processing, a new bus structure, and robust error handling, these systems provide a wide range of performance and configurability within a single cabinet. Standard features include one to twelve symmetric PA-RISC 7100 multiprocessors optimized for commercial workloads, main memory configurations from 128M to 2G bytes, and disk storage up to a maximum of 1.9 terabytes, by Thomas B. Alexander, Kenneth G. Robertson, Dean T. Lindsay, Donald L. Rogers, John R. Obermeyer, John R. Keller, Keith Y. Oka, Marlin M. Jones II, pg 8-30. HP 9000 Model T500.

Package Design Using 3D Solid Modeling, pg 29

PA-RISC Symmetric Multiprocessing in Midrange Servers. By making a series of simplifying assumptions and concentrating on basic functionality, the performance advantages of PA-RISC symmetric multi-processing using the HP PA 7100 processor chip were made available to the midrange HP 9000 and HP 3000 multiuser system customers, by Kirk M. Bresniker, pg 31-33

SoftBench Message Connector: Customizing Software Development Tool Interactions. Software developers using the SoftBench Framework can customize their tool interaction environments to meet their individual needs, in seconds, by pointing and clicking. Tool interaction branching and chaining are supported. No user training is required, by Joseph J. Courant, pg 34-39

Six-Sigma Software Using Cleanroom Software Engineering Techniques. Virtually defect-free software can be generated at high productivity levels by applying to software development the same process discipline used in integrated circuit manufacturing, by Grant E. Head, pg 40-50

Legal Primitive Evaluation, pg 47

Fuzzy Family Setup Assignment and Machine Balancing. Fuzzy logic is applied to the world of printed circuit assembly manufacturing to aid in balancing machine loads to improve production rates, by Jan Krucky, pg 51-64

The Greedy Board Family Assignment Heuristic, pg 54

Authors June 1994: Thomas [Tom] B. Alexander, Kenneth [Ken] G. Robertson, Dean T. Lindsay, Donald [Don] L. Rogers, John R. Obermeyer, John R. Keller, Keith Y. Oka, Marlin M. Jones II, Kirk M. Bresniker, Joseph [Joe] L. Courant, Grant E. Head, Jan [Honza] Krucky, pg 65-66

August 1994 v.45 n.4

Cover: The HP 48GX advanced scientific graphing calculator displays a wireframe plot of the surface z = x³y – xy³ .

An Advanced Scientific Graphic Calculator. The HP 48G/GX combines an easy-to-learn graphical user interface with advanced mathematics and engineering functionality, expanded memory capability, and seven new plot types, by Diana K. Bryne, Charles M. Patton, David Arnett, Ted W. Beers, Paul J. McClellan, pg 6-22

User Versions of Interface Tools, pg 20

HP-PAC: A New Chassis and Housing Concept for Electronic Equipment. HP-PAC replaces the familiar metal chassis structure with expanded polypropylene (EPP) foam. Large reductions are realized in mechanical parts, screw joints, assembly time, disassembly time, transport packaging, and housing development costs, by Johannes Mahn, Jurgen Haberle, Siegfried Kopp, Tim Schwegler, pg 23-28

High-Speed Digital Transmitter Characterization Using Eye Diagram Analysis. The eye diagram analyzer constructs both conventional eye diagrams and special eyeline diagrams to perform extinction ratio and mask tests on digital transmitters. It also makes a number of diagnostic measurements to determine if such factors as waveform distortion, intersymbol interference, or noise are limiting the bit error ratio of transmission system, by Christopher M. Miller, pg 29-37. BERT, 71501A.

Thermal Management in Supercritical Fluid Chromatography. In supercritical fluid chromatography, very high degrees of accuracy are required for temperature control. On the fluid supply end of the system, cooling is critical. On the separation end, heating is important. This paper discusses temperature control in the HP G1205A supercritical fluid chromatograph, by Connie Nathan, Barbara A. Hackbarth, pg 38-42

What is SFC?, by Connie Nathan, pg 39

Linear Array Transducers with Improved Image Quality for Vascular Ultrasonic Imaging. This project not only achieved its goal of improving the near-field image quality of an existing transducer design, but also added two-frequency operation, by Matthew G. Mooney, Martha Grewe Wilson, pg 43-51. 21255B, 21258B.

Structured Analysis and Design in the Redesign of a Terminal and Serial Printer Driver. The project team felt that the objectives could not be met with a traditional design approach. Structured analysis with real-time extensions and structured design provided an effective alternative, by Catherine L. Kilcrease, pg 52-61. HP 3000.

Data-Driven Test Systems. In a data-driven test system, all product-specific information is stored in files. Within a product classification, the test software contains no product-specific information and does not have to be changed to test a new product. This concept lowers new product introduction costs, by Adele S. Landis, pg 62-66

Authors August 1994: Diana K. Byrne, Charles [Charlie] M. Patton, David Arnett, Ted W. Beers, Paul J. McClellan, Johannes Mahn, Jurgen Haberle, Siegfried Kopp, Tim Schwegler, Christopher [Chris] M. Miller, Connie Nathan, Barbara A. Hackbarth, Matthew [Matt] G. Mooney, Martha Grewe Wilson, Catherine [Keti] L. Kilcrease, Adele S. Landis, pg 66-68

October 1994 v.45 n.5

Cover: The HP E1413 scanning ADC VXIbus module with two of its signal conditioning plug-ons removed and one of its application areas (jet engine test) shown in the background.

Customer-Driven Development of a New High-Performance Data Acquisition System. The HP HD2000 data acquisition system provides C-size VXIbus modules that are tailored to provide fast and accurate acquisition of temperature, pressure, strain, volts, and resistance data for turbine and piston engine testing applications, by Von C. Campbell, pg 6-8

A Compact and Flexible Signal Conditioning System for Data Acquisition. Because turbine test setups can have up to 1000 test points, special demands are placed on a data acquisition system that must fit a large number of measurement channels into a C-size VXIbus module, by John M. da Cunha, pg 9-15. HD2000.

High-Throughput Amplifier and Analog-to-Digital Converter. High system throughput in converting analog signals to digital format in the HP E1413 is achieved by not relying on downstream digital processing hardware and software to compensate for analog anomalies and instabilities, by Ronald J. Riedel, pg 16-20

Binary Ranges Speed Processing, pg 18

On-the-Fly Engineering Units Conversion. An algorithm has been developed that provides engineering units conversion in real time (10 microseconds) in the HP E1413 scanning analog-to-digital converter instrument. The algorithm converts numbers to IEEE 754 standard 32-bit floating-point format, by Christopher P. J. Kelly, pg 21-24

Built-In Self-Test and Calibration for a Scanning Analog-to-Digital Converter. Onboard calibration capability enables the HP E1413 to calibrate all 64 input channels in under 15 minutes, many times faster than the manual calibration techniques previously required in similar systems, by Gerald I. Raak, Christopher P. J. Kelly, pg 25-29

A Hierarchy of Calibration Commands, pg 28

Manufacturing Test Optimization for VXI-Based Scanning Analog-to-Digital Converters. The high density of the hardware for the HP E1413 scanning analog-to-digital converter, the low cost per channel, and the wide variety of optional signal conditioning plug-ons require a production test strategy that is fast, flexible, and efficient, by Bertram S. Kolts, Rodney K. Village, pg 30-34

Design Leverage and Partnering in the Design of a Pressure Scanning Analog-to-Digital Converter. The HP E1414 pressure scanning VXIbus analog-to-digital converter completes HP’s VXIbus offering for jet engine and wind tunnel test applications by providing the ability to make pressure measurements, by Richard E. Warren, Conrad R. Proft, pg 35-41

Integrated Pin Electronics for Automatic Test Equipment. A single integrated circuit provides complete pin electronics for the HP 9493 mixed signal LSI test system. It contains a high-speed digital driver, an active load, a window comparator, and a parametric tester for setting a voltage and measuring current, by James W. Grace, David DiPietro, Akito Kishida, Kenji Kinsho, pg 42-50

CMOS Programmable Delay Vernier. In the HP 9493 LSI test system, CMOS delay verniers replace the usual bipolar technology and are integrated with digital circuitry to produce a high-performance timing generator in a single monolithic CMOS VLSI formatter chip. This solution achieves bipolar-equivalent resolution, skew, and jitter performance with significantly lower power, cost, and circuit board space, by Masaharu Goto, James O. Barnes, Ronnie E. Owens, pg 51-58

Theoretical Approach to CMOS Inverter Jitter, by Masaharu Goto, pg 54-55

Real-Time Digital Signal Processing in a Mixed-Signal LSI Test System. In test subsystems based on digital signal processing, the HP 9493 test system emulates the analog and digital signals of the device under test, thereby reducing test time and increasing test coverage compared to a memory-based test system, by Keita Gunji, pg 59-63

Vector Error Testing by Automatic Test Equipment. Mixed-signal testers are frequently used as specialized automatic test equipment in various test applications. The real-time digital signal processors in the HP 9493 mixed-signal LSI test system can perform complex tests for next-generation telecommunication devices, by Koji Karube, pg 64-66

High-Frequency Impedance Analyzer. A new one-port impedance analyzer measures high-frequency devices up to 1.8 GHz. Using a current-voltage method, it makes precise measurements over a wide impedance range. A special calibration method using a low-loss capacitor realizes an accurate high-Q device measurement. Many types of test fixtures are introduced because they are a key element in any test system, by Takanori Yonekura, pg 67-74. 4291A.

Virtual Remote: The Centralized Expert. Remote operation of bit error test sets using a X Windows based “virtual instrument” allows network operators to monitor remote sites from a central office. The extensive use of a common firmware development platform allowed the fast-track development of virtual remote software and rapid integration into all instruments built using the platform, by Hamish Butler, pg 75-82. 15800A.

Frame Relay Conformance Testing. At HP’s Protocol Test Center, an automatic translator was developed to transform abstract test suites into executable test suits for HP IDACOM protocol analyzers, by Martin Dubuc, pg 83-87

Glossary, pg 83

The FDDI Ring Manager for the HP Network Advisor Protocol Analyzer. The FDDI Ring Manager application takes the knowledge burden from the user and puts it on the network management tool. It pulls ring status information from station management frames and presents it in a logically ordered display. It gathers ring topology information from neighbor information frames and status information frames and presents that information in a graphical map and a textual report, by Sunil Bhat, Robert H. Kroboth, Anne L. Driesbach, pg 88-96

FDDI Topology Mapping. For the FDDI version of the HP Network Advisor protocol analyzer, ring mapping algorithms were devised to provide topological views of FDDI networks. These algorithms are designed to handle many problem situations that are characteristic of emerging LAN technologies, by Sunil Bhat, pg 97-105

Automation of Electrical Overstress Characterization for Semiconductor Devices. An automatic test system has been developed to characterize semiconductor devices and interconnect failures caused by electrical overstress (EOS). Electrical stress in the form of current pulses of increasing amplitude is applied to a device until it reaches a prespecified failure criterion. The system was developed for monitoring EOS robustness in advanced CMOS processes, by Carlos H. Diaz, pg 106-111

Authors October 1994: Von C. Campbell, John M. da Cunha, Ronald [Ron] J. Riedel, Christopher [Chris] P. J. Kelly, Gerald [Gerry] I. Raak, Bertram [Bert] S. Kolts, Rodney [Rod] K. Village, Richard [Rick] E. Warren, Conrad R. Proft, James [Jim] W. Grace, David [Dave] M. DiPietro, Akito Kishida, Kenji Kinsho, Masaharu Goto, James [Jim] O. Barnes, Ronnie E. Owens, Keita Gunji, Koji Karube, Takanori [Taka] Yonekura, Hamish Butler, Martin Dubuc, Robert [Bob] H. Kroboth, Anne L. Driesbach, Sunil Bhat, Carlos H. Diaz, pg 112-115

December 1994 v.45 n.6

Cover: An exploded view of the interior of the HP C1553A DDS tape autoloader, showing the C1533A DDS-2 tape drive and the small amount of space around it that was available to the autoloader designers. Also shown is the six-cartridge autoloader magazine in the front-panel door.

Fast DDS-2 Digital Audio Tape Drive. Running at data transfer rate of 510 kbytes/s, the HP C1533A tape drive can record a full 4-Gbyte DDS-2 cartridge in just over two hours, almost an hour less than typical DDS-2 drives. Its development required improvements in tape material, length, and thickness, new read and write heads, a new drum design, and new methods for linearity measurement and adjustment, by Damon R. Ujvarosy, pg 6-11. Digital Data Storage.

DDS-2 Tape Autoloader: High-Capacity Data Storage in a 5 1/4 Inch Form Factor. The autoloader holds six 4-gigabyte cartridges. With data compression, it can back up typically 48 Gbytes of data overnight or 8 Gbytes every day for six days, unattended, by Steven A. Dimond, pg 12-20. C1553A.

Autoloader Control Electronics, by Greg K. Trezise, pg 13

Autoloader Firmware Design, by Mark Simms, pg 15-16

Network Backup with the HP C1553A DDS Autoloader, by Michael G. Bertagne, pg 18-19

Automatic State Table Generation. The HP C1553A DDS tape autoloader requires a complex sequence of simple operations to carry out mechanical retries. These sequences are defined in tables. Cadre’s Teamwork was used for input and an automatic tool was used to generate the tables to go in ROM, by Mark J. Simms, pg 21-26

Using State Machines as a Design and Coding Tool. The wide acceptance of real-time extensions to structured analysis techniques have led to the use of state machine descriptions for the specification of systems in which state or sequence is a vital part. However, the techniques for implementing these specifications have remained poorly understood and haphazard, leading to implementations that are difficult to verify against the specification. This paper examines different approaches to the use of state machines and explores their advantages and disadvantages, by Mark J. Simms, pg 27-32. Mealy Model.

An Event-Based, Retargetable Debugger. Remote and event-based debugging capability, a sophisticated graphical user interface, and adaptability to different languages and target platforms are some of the features provided in this debugger, by Arun K. Iyengar, Thaddeus S. Grzesik, Valerie J. Ho-Gibson, Tracy A. Hoover, John R. Vasta, pg 33-43. Distributed Debugging Environment, HP DDE.

Compiler Optimizations and Debugging, pg 37

A Short Primer on Debugger Internals, pg 39

Wavelet Analysis: Theory and Applications. Wavelet analysis has attracted attention for its ability to analyze rapidly changing transient signals. Any application using the Fourier transform can be formulated using wavelets to provide more accurately localized temporal and frequency information. This paper gives an overview of wavelet analysis and describes a software toolbox created by HP Laboratories Japan to aid in the development of wavelet applications, by Daniel T.L. Lee, Akio Yamamoto, pg 44-54

Approaches to Verifying Operational Test Release Vectors. Five techniques are employed to minimize the time to develop the test vectors used to test manufactured parts on an IC component tester, by Joy Xiao Han, pg 55-59. Chelmsford.

Overview of the Test Access Port, pg 56-57

Estimating the Value of Inspections and Early Testing for Software Projects. A return-on-investment model is developed and applied to a typical software project to show the value of doing inspections and unit and module testing to reduce software defects, by Louis A. Franz, Jonathan C. Shih, pg 60-67

Clock Design and Measurement Issues in Pentiumä Systems. Design difficulties in producing a statistically stable 66-MHz Pentium system are reviewed. The information is pertinent to many other new, high-speed processors as well. A new, more informed approach to designing well-timed systems in this performance class is proposed. Measurements that support this approach are examined, particularly those made with the HP 8133A pulse generator, by Michael K. Williams, Andreas M.R. Pfaff, pg 68-77

Tolerance Mechanisms in Clock Distribution Networks, pg 70-71

Authors December 1984: Damon R. Ujvarosy, Steven [Steve] A. Dimond, Mark J. Simms, Arun K. Iyengar, Tracy A. Hoover, John R. Vasta, Thaddeus [Ted] S. Grzesik, Valerie J Ho-Gibson, Daniel [Dan] T. L. Lee, Akio Yamamoto, Joy Xiao Han, Jonathan C. Shih, Louis [Lou] A. Franz, Michael [Mike] K. Williams, Andreas M. R. Pfaff, M. Shahid Mujtaba, pg 77-79

Enterprise Modeling and Simulation: Complex Dynamic Behavior of a Simple Model of Manufacturing. Simulating a structurally simple model of a manufacturing enterprise revealed complex dynamic behavior. Enterprise modeling and simulation provided estimates of end-of-life inventory and order delivery performance based on interactions of forecast quality, quoted product availability, material procurement and safety stock policies, vendor lead times, product life cycles, and part commonality. An unexpected result was that end-of-life inventory can exist even under ideal environmental conditions. Prospective applications of these methods include estimating the effects of incremental improvements, verifying impacts of process changes and generating enterprise behavior information, by M. Shahid Mujtaba, pg 80-107

Glossary of Terms and Abbreviations, pg 85

Enterprise Modeling and Simulation Applications in Reengineering, pg 86-87

Enterprise Modeling and Simulation Research at HP Laboratories, pg 90-91

The Simple Model: Sponsor’s Perspective, by Jerry Harmon, pg 105

Appendix I: Mathematics of Production and Material Planning for the Simple Model, pg 108-110

Appendix II: Weekly Event Sequence, pg 110

Appendix III: Details of Part Commonality Experiments, pg 111

Appendix IV: Details of Explanations for Experiments 0 and 1a, pg 112

Index: Volume 45 January 1994 through December 1994. PART 1: Chronological Index, pg 113-114. PART 2: Subject Index, pg 115-118. PART 3: Product Index, pg 119. PART 4: Author Index, pg 119-120

February 1993 v.44 n.1

Cover: A diffraction grating, a piece of glass with 1200 grooves per millimeter etched into its surface.

Photonic Technology for Lightwave Communications Test Applications. State-of-the-art fiber-optic, integrated-optic, bulk-optic, and optoelectronic devices and subsystems provide a technology base for high-speed, high-performance lightwave communications test instrumentation, by Waguih S. Ishak, Kent W. Carey, William R. Trutna, Jr., Steven A. Newton, pg 6-10

Tunable Laser Sources for Optical Amplifier Testing. Two models of laser sources tune over wavelength ranges of 50 and 65 nanometers using grating-tuned external-cavity lasers with precisely controlled wavelength and power level. They are designed for testing wideband components such as erbium-doped fiber amplifiers, by Bernd Maisenbacher, Edgar Leckel, Michael Pott, Robert Jahn, pg 11-19. 8167A, 8168A.

Correction: Two missing lines from page 103 in the December 1992 issue, pg 19

External-Cavity Laser Design and Wavelength Calibration. Sophisticated tuning and calibration methods coordinate the effects of a diffraction grating wavelength selector and a Fabry-Perot etalon side-mode suppression filter to ensure accurate wavelength selection and single-mode operation in the HP 8167A and 8168A tunable laser sources, by Emmerich Muller, Clemens Ruck, Rolf Steiner, Wolfgang Reichert, pg 20-27

External-Cavity Laser Temperature Stabilization and Power Control. The theory and operation of the laser temperature control and measurement circuits and the output power control and calibration of the HP 8167A/68A tunable laser sources are presented, by Edgar Leckel, Horst Schweikardt, pg 28-31

Dual-Output Laser Module for a Tunable Laser Source. This reliable, hermetically sealed laser module is a key component in the HP 8167A and HP 8168A tunable laser sources. The semiconductor laser chip is precisely and stably aligned to two output lenses. One facet of the laser chip is antireflection-coated and has very low residual reflectivity, by Kari K. Salomaa, David M. Braun, Roger L. Jungerman, pg 32-34

Research on External-Cavity Lasers. The external-cavity laser is more complicated than it seems, showing both bistability and multimoding behavior. Thorough detective work was needed to understand this behavior and develop the light source for the HP 8167A and HP 8168A tunable laser sources, by Paul Zorabedian, William R. Trutna, Jr., pg 35-38

Design of a Precision Optical Low-Coherence Reflectometer. The HP 8504A precision reflectometer uses the classic Michelson interferometric measurement technique to allow designers and manufacturers to measure reflections easily in optical components and assemblies. Spatial resolution is on the order of tens of micrometers, by Rollin F. Rawson, Harry Chou, Michael G. Hart, D. Howard Booster, Steven J. Mifsud, pg 39-48

Averaging Measurements to Improve Sensitivity, pg 44-45

Fabrication of Diffused Diodes for HP Lightwave Applications. The simple but robust p-i-n dual detector used in the receiver of the HP 8504A precision reflectometer has -17 dB return loss (2% reflection) operating at both 1300 nm and 1550 nm, by Patricia A. Beck, pg 49-51

High-Resolution and High-Sensitivity Optical Reflection Measurements Using White-Light Interferometry. In the HP 8504A precision reflectometer white-light interferometry is used as a nondestructive measurement technique for probing closely spaced reflections in optical devices, by Wayne V. Sorin, Harry Chou, pg 52-59

A Modular All-Haul Optical Time-Domain Reflectometer for Characterizing Fiber Links. The HP 8146A optical time-domain reflectometer provides good dynamic range and dead-zone performance and user interface features such as comprehensive documentation capabilities and automatic link characterization, by Wilfried Pless, Josef Beller, pg 60-62

A High-Performance Signal Processing System for the HP 8146A Optical Time-Domain Reflectometer. Three custom integrated circuits and a powerful 24-bit digital signal processor offload data processing from the instrument’s host processor, by Josef Beller, pg 63-68

Improving SNR by Averaging, pg 65

Design Considerations for the HP 8146A OTDR Receiver. Low noise, high bandwidth, and good linearity are characteristics that guided the OTDR receiver circuit design, by Frank Maier, pg 69-71

User Interface Design for the HP 8146A OTDR. Based on a multiprocessing operating system, the HP 8146A OTDR software can handle simultaneous executive of instrument operations, hide the complexity of instrument operations from the user, and provide a range of user-friendly features, by Harald Seeger, Robert Jahn, pg 72-78

Analyzing OTDR Traces on a PC with a Windows User Interface, by Wilfried Pless, pg 77

High-Performance Optical Return Loss Measurement. Although high-performance optical return loss measurements pose some tough technical challenges for fiber optic engineers, careful selection of appropriate test equipment and correct setup make precise measurements readily achievable. A new return loss module for the HP 8153A lightwave multimeter simplifies these measurements, by Siegmar Schmidt, pg 79-82

High-Speed Time-Domain Lightwave Detectors. The HP 83440 Series unamplified p-i-n lightwave detectors are designed for the best possible pulse performance. They are dc coupled and have bandwidths of 6, 20, and 32 GHz. They mate directly with high-speed sampling oscilloscopes, by Stephen W. Hinch, David M. Braun, Karl Shubert, Randall King, pg 83-86

InP/InGaAs/InP P-I-N Photodetectors for High-Speed Lightwave Detectors, by Susan Sloan, pg 85

Calibration of Lightwave Detectors to 50 GHz. Because they operate at much higher frequencies than previous products, new methods had to be found to test and calibrate the HP 83440 Series lightwave detectors. Three systems were developed. Their results agree closely, by Kok Wai Chang, Christopher J. Madden, David J. McQuate, pg 87-92

Authors February 1993: Waguih S. Ishak, Kent W. Carey, Steven [Steve] A. Newton, Bernd Maisenbacher, Robert Jahn, Michael Pott, Emmerich Muller, Wolfgang Reichert, Clemens Ruck, Rolf Steiner, Horst Schweikardt, Edgar Leckel, Roger L. Jungerman, Kari K. Salomaa, William [Rick] R. Trutna, Jr., Paul Zorabedian, D. Howard Booster, Michael [Mike] G. Hart, Steven [Steve] J. Mifsud, Rollin [Fred] F. Rawson, Patricia [Patti] A. Beck, Harry Chou, Wayne V. Sorin, Josef Beller, Wilfried Pless, Frank A. Maier, Harald Seeger, Siegmar Schmidt, Randall [Randy] King, David M. Braun, Stephen [Steve] W. Hinch, Karl Shubert, David J. McQuate, Kok [Bill] Wai Chang, Christopher [Chris] J. Madden, pg 92-96

April 1993 v.44 n.2

Cover: The advanced microwave synthesized signal generators, sweep oscillators, and pulse generator featured in this issue depend on state-of-the art hybrid microcircuit technology for performance, reliability, and economy. On the cover, some of the microcircuits developed for these products pose for a group photograph.

A New Family of Microwave Signal Generators for the 1990s. This family of generators includes both stand-alone and modular versions. A new architecture and state-of-the-art technologies result in advanced performance, by William W. Heinz, Ronald E. Pratt, Peter H. Fisher, pg 6-11. 8370, 70340 Series.

Broadband Fundamental Frequency Synthesis from 2 to 20 GHz. A broadband fundamental YIG-tuned oscillator is locked to a stable reference and controlled by four phase-locked loops to produce the low-phase-noise output signal of the HP 8370 and 70340 signal generators, by Edward G. Cristal, Thomas L. Grisell, Brian R. Short, pg 12-16

A New High-Performance 0.01-to-20-GHz Synthesized Signal Generator Microwave Chain. Driven by a broadband YIG oscillator, the microwave chain only divides the oscillator output instead of multiplying and heterodyning like previous designs. The benefits include no subharmonics and higher-performance pulse and amplitude modulation. The major functions of the microwave chain are integrated on two microcircuits, by William D. Baumgartner, John S. Brenneman, John L. Imperato, Douglas A. Larson, Ricardo de Mello Peregrino, Gregory A. Taylor, pg 17-29. 8370, 70340 Series.

Internal Pulse Generator, by Douglas A. Larson, pg 27-28

Concurrent Signal Generator Engineering and Manufacturing. Production tests were developed early enough to be used for design characterization. Several new production processes were developed. The project had a design-for-assembly philosophy, an integrated assembly and pretest strategy, online video-image production procedures, and a networked computing test environment, by Kevin G. Smith, Camala S. Kolseth, Christopher J. Bostak, pg 30-37. 8370, 70340 Series.

A Design for Manufacturability, Design for Testability Checklist, pg 33

A New Generation of Microwave Sweepers. The HP 83750 family of microwave sweepers achieves a new level of swept frequency accuracy by being full synthesized in all sweep modes, including fast analog sweeps. It also uses fundamental oscillators for improved signal purity, by Jason A. Chodora, Alan R. Bloom, James R. Zellers, pg 38-45

Third-Order Curve-Fit Algorithm, by Alan Bloom, pg 41

A Digitally Corrected Fractional-N synthesizer, by Jason Chodora, pg 44

Microcircuits for the HP 83750 Series Sweepers. Four custom microcircuits provide the basic output signal, the RF band, signal switching and distribution, amplification, ALC and pulse modulation, power amplification, and two stages of YIG filtering, by Rick R. James, Eric V.V. Heyman, Roger R. Graeber, pg 46-51

A Programmable 3-GHz Pulse Generator. This new one-or-two channel pulse generator provides precise edge placement, extensive functionality, and an interactive user interface. It is designed to help characterize and debug CMOS, ECL, and GaAs devices and signal integrity problems, by Hans-Jurgen Wagner, pg 52-55. 8133A.

Pulse/Data Channel Extends Programmable Pulse Generator Applications. This optional second channel for the HP 8133A pulse generator has a dividable square wave mode, a 32-bit data burst mode, and a pseudo-random binary sequence (PRBS) mode. Its major components are a data gate array, a multiplexer, a phase-locked loop, and an output section. Most circuits are ECL, by Christoph Kalkuhl, pg 56-59

Design of a 3-GHz Pulse Generator. Period, delay, and width generation for the HP 8133A pulse generator depend on several thick-film and thin-film hybrid circuits and custom GaAs and bipolar ICs. The high frequencies and fast transitions made radiated interference suppression challenging, by Peter Schinzel, Allan R. Armstrong, Thomas Fischer, Thomas Dippon , Andreas Pfaff, pg 60-72

Cooling of the Frequency Divider IC, by Thomas Fischer, pg 61

A Multirate Bank of Digital Bandpass Filters for Acoustic Applications. Real-time frequency analyzers have been used for over twenty years for acoustic noise measurements. Recent advances in digital signal processing technology have improved the performance and usefulness of these analyzers. The HP 3569A portable real-time frequency analyzer, for example, makes complex acoustical measurements easier and more affordable than ever before, by James W. Waite, pg 73-81

Continuous Monitoring of Remote Networks: The RMON MIB. An introduction to the capabilities of the Remote Monitoring Management Information Base of the Simple Network Management Protocol and its implementation in the HP LanProbe II network monitor, by Matthew J. Burdick, pg 82-89

The HP 64700 Embedded Debug Environment: A New Paradigm for Embedded System Integration and Debugging. The HP 64700 embedded debug environment gives embedded system developers complete access to state-of-the-art real-time measurements and controls in addition to C and C++ static debugging capabilities on HP and Sun workstations, by Robert D. Gronlund, Richard A. Nygaard, Jr., John T. Rasper, pg 90-106

The Value of Usability, by John D’Alessandro, pg 91

The Debug Environment Connection to HP SoftBench, by David L. Neuder, pg 93

A Real-Time Operating System Measurement Tool, by Mike Dotseth, pg 97-98

A New Perspective on Emulation Hardware Modularity, by Thomas C. Ferguson, pg 102

Software Performance Analysis of Real-Time Embedded Systems. The HP B1487 software performance analyzer is a plug-in card for the HP 64700 emulator system. It makes activity and interval measurements on instrumented code for embedded microprocessor systems. The design is able to deal with difficult analysis situations involving caches and prefetches, by Arnold S. Berger, David L. Neuder, Andrew J. Blasciak, pg 107-115

Authors April 1993: William [Bill] W. Heinz, Ronald [Ron] E. Pratt, Peter H. Fisher, Brian R. Short, Thomas [Tom] L. Grisell, Edward [Bud] G. Cristal, William [Bill] D. Baumgartner, John S. Brenneman, John L. Imperato, Douglas A. Larson, Ricardo [Ric] de Mello Peregrino, Gregory [Greg] A. Taylor, Christopher [Chris] J. Bostak, Camala [Cam] S. Kolseth, Kevin G. Smith, Alan R. Bloom, Jason A. Chodora, James [Jim] R. Zellers, Eric V. V. Heyman, Rick R. James, Roger R. Graeber, Hans-Jurgen Wagner, Christoph Kalkuhl, Peter Schinzel, Andreas Pfaff, Thomas Dippon, Thomas Fischer, Allan R. Armstrong, James [Jim] W. Waite, Mathew [Matt] J. Burdick, Robert [Bob] D. Gronlund, Richard [Rick] A. Nygaard, Jr., John T. Rasper, Andrew [Andy] J. Blasciak, David [Dave] L. Neuder, Arnold [Arnie] S. Berger, pg 116-120

June 1993 v.44 n.3

Cover: The HP ORCA analytical robot in action

ORCA: Optimized Robot for Chemical Analysis. This analytical PC peripheral is a congenial assistant, a sophisticated robotic teaching environment, and an interesting study of robotic architecture. Although optimized for the analytical laboratory, it also has applications in electronic test, quality assurance, and the clinical laboratory, where heavy commercial assembly robots are unsuitable, by Arthur Schleifer, Gary B. Gordon, Joseph C. Roark, pg 6-19

The HP ORCA System Outside the Analytical Laboratory, by Nancy Adams, pg 9

Gravity-Sensing Joy Stick, pg 12

Absolute Digital Encoder, pg 14

HP OpenODB: An Object-Oriented Database Management System for Commercial Applications. The functionality of object-oriented technology and basic relational database features such as access control, recovery, and a query language are provided in HP OpenODB, by Tu-Ting Cheng, Rafiul Ahad, pg 20-30

The HP Ultra VGA Graphics Board. By increasing the display memory to 1M byte and providing some local graphics processing, the HP Ultra VGA board is able to increase VGA resolution to 1024 by 768 pixel with 256 colors at all resolutions, by Myron R. Tuttle, Kenneth M. Wilson, Samuel H. Chau, Yong Deng, pg 31-40. D2325A.

POSIX Interface for MPE/iX. Differences in directory structure, file naming conventions, and security were among the areas in which mechanisms had to be developed to enable the POSIX and MPE XL interfaces to coexist on one operating system, by Rajesh Lalwani, pg 41-46. Portable Operating System Interface.

A Process for Preventing Software Hazards. Preventing software hazards in safety-critical medical instrumentation requires a process that identifies potential hazards early and tracks them throughout the entire development process, by Brian Connolly, pg 47-52

Configuration Management for Software Tests. To support software test reuse and to make it easier to ensure that the correct software versions are used to test printer products, a software test management system has been put in place, by Leonard T. Schroath, pg 53-59. TLMS, Test Library Management System.

Implementing and Sustaining a Software Inspection Program in an R&D Environment. Although software inspections have become a common practice in the software development process, introducing the inspection process and sustaining and measuring its success are still challenges, by Jean M. MacLeod, pg 60-63

The Use of Total Quality Control Techniques to Improve the Software Localization Process. By implementing a few inexpensive process improvement steps, the time involved in doing translations for text used in HP’s medical products has been significantly reduced, by John W. Goodnow, William A. Koppes, Cindie A. Hammond, John J. Krieger, D. Kris Rovell-Rixx, Sandra J. Warner, pg 64-70. TQC.

Tools for the Language Translation Process, by George Rom, pg 68-69

A Transaction Approach to Error Handling. The transaction-based recovery concept used in databases can be applied to commercial applications to help provide more reusable and maintainable programs, by Bruce A. Rafnel, pg 71-77

Error Definition, pg 72

Authors June 1993: Gary B. Gordon, Joseph [Joe] C. Roark, Arthur [Artie] Schleifer, Rafiul Ahad, Tu-Ting Cheng, Myron R. Tuttle, Kenneth [Ken] M. Wilson, Samuel [Sam] H. Chau, Yong Deng, Rajesh Lalwani, Brian Connolly, Leonard [Len] T. Schroath, Jean M. MacLeod, John W. Goodnow, Cindie A. Hammond, William [Bill] A. Koppes, John J. Krieger, Daniel Kris Rovell-Rixx, Sandra [Sandy] J. Warner, Bruce A. Rafnel, Mark H. Notess, pg 77-79

User Interface Management System for HP-UX System Administration Applications. Developing applications to simplify HP-UX system administration has been made easier by the creation of a tool that addresses the needs of the developer, by Mark H. Notess, pg 80-84

SAM versus Manual Administration, pg 81

August 1993 v.44 n.4

Cover: This photograph illustrates many of the features of the new HP AllnGaP light-emitting diodes.

High-Efficiency Aluminum Indium Gallium Phosphide Light Emitting Diodes. These devices span the color range from red-orange to green and have the highest luminous performance of any visible LED to date. They are produced by organometallic vapor phase epitaxy, by Virginia M. Robbins, Timothy D. Osentowski, Chihping Kuo, Jiann Gwo Yu, Robert M. Fletcher, pg 6-14. LEDs.

The Structure of LEDs: Homojunctions and Heterojunctions, pg 8-9

HP Task Broker: A Tool for Distributing Computational Tasks. Intelligent distribution of computation tasks, collective computing, load balancing, and heterogeneity are some of the features provided in the Task Broker tool to help make existing hardware more efficient and software developers more productive, by James J. Turne, John M. Lewis, Edward J. Sharpe, Renato G. Assini, Terrence P. Graf, Michael C. Ward, pg 15-22

HP Task Broker and Computational Clusters, pg 16

Task Broker and DCE Interoperability, pg 19

HP Task Broker Version 1.1, pg 21

The HP-RT Real-Time Operating System. An operating system that is compatible with the HP-UX operating system through compliance with the POSIX industry standards uses a multi-threaded kernel and other mechanisms to provide guaranteed real-time response to high-priority operations, by Kevin D. Morgan, pg 23-30

An Overview of Threads, pg 27

Managing PA-RISC Machines for Real-Time Systems. In the HP-RT operating system, the interrupt-handling architecture is especially constructed to manage the high-performance timing requirements of real-time systems, by George A. Anzinger, pg 31-37. HP-RT.

Context Switching in HP-RT, pg 32

Protecting Shared Data Structures, pg 33

The Shadow Register Environment, pg 34

C Environment, pg 35

The HP Tsutsuji Logic Synthesis System. A new logic synthesis system has reduced the time to design ASICs by a factor of ten, by Yoshisuke Otsuru, J. Barry Shackleford, W. Bruce Culbertson, Motoo Tanaka, Toshiki Osame, pg 38-51

Designing a Scanner with Color Vision. The challenge for personal computer imaging today is to duplicate human color vision, not only in scanners but also in monitors and printers so that colors look the same in all media. The HP ScanJet IIc scanner uses a proprietary color separator design to provide fast, single-scan, 400-dpi, 24-bit color image scanning, by Michael J. Steinle, K. Douglas Gennetten, pg 52-58

Authors August 1993: Robert [Bob] M. Fletcher, Chihping [C. P.] Kuo, Timothy [Tim] D. Osentowski, Jiann Gwo Yu, Virginia M. Robbins, Terrence [Terry] P. Graf, Renato [Ron] G. Assini, Edward [Ed] J. Sharpe, John M. Lewis, James J. Turner, Michael [Mike] C. Ward, Kevin D. Morgan, George A. Anzinger, W. Bruce Culbertson, Toshiki Osame, Yoshisuke Otsuru, J. Barry Shackleford, Motoo Tanaka, K. Douglas Gennetten, Michael [Mike] J. Steinle, Brad Clements, Franco A. Canestri, David [Dave] A. Keefer, Brian E. Hoffmann, Douglas [Doug] K. Howell, Timothy [Tim] C. O’Konski, Joseph [Joe] M. Luszcz, Daniel [Dan] G. Maier, pg 58-61

Mechanical Considerations for an Industrial Workstation. Besides being a compute and data processing engine, a workstation in an industrial and measurement environment must be mechanically designed to handle the special requirements of these environments, by Brad Clements, pg 62-67. HP 9000 Models 745i, 747i.

Online CO₂ Laser Beam Real Time Control Algorithm for Orthopedic Surgical Applications. New data obtained from treating polymethylmethacrylate (PMMA) with a nonmoving, CW, 10-watt, C0₂ laser beam is presented. Guidelines based on this data can be used during precision laser surgery in orthopedics to avoid unnecessary mechanical and thermal trauma to healthy bone tissue. A computerized algorithm incorporating these guidelines can be implemented on an HP 9000 workstation connected to a central database for multiple-operating-room data collection, online consultation and analysis, by Franco A. Canestri, pg 68-72

Online Defect Management via a Client/Server Relational Database Management System. The ability to provide timely access to large volumes of data, ensure data and process integrity, and share defect data among related projects are the main features provided in this new defect management system, by David A. Keefer, Douglas K. Howell, Brian E. Hoffmann, pg 73-84. DMS.

Client/Server Database Architecture, pg 78-79

Realizing Productivity Gains with C++. Although C++ contains many features for supporting highly productive software development, some characteristics of this object-oriented programming language tend to slow the realization of these productivity gains, by Timothy C. O’Konski, pg 85-89

Glossary, pg 86

Bridging the Gap between Structured Analysis and Structured Design for Real Time Systems. A real-time software design technique has been applied to the design of the software architecture for ultrasound imaging products, by Joseph M. Luszcz, Daniel G. Maier, pg 90-99. SA, SD, ADARTS.

Structured Analysis and Structured Design Refresher, pg 92-93

October 1993 v.44 n.5

Cover: The acquisition hybrid microcircuit of the HP 54720D and HP 54710D oscilloscopes

An 8-Gigasample-per-Second Modular Digitizing Oscilloscope System. For the first time, a digitizing sampling oscilloscope achieves single-shot bandwidths exceeding even the fastest laboratory analog oscilloscopes. The HP 54720/10 oscilloscope combines a 2-GSa/s digitizer, plug-in modularity, and software flexibility to provide the application-specific and general-purpose capabilities needed by designers of high-speed digital devices and systems, by John A. Scharrer, pg 6-10

An 8-Gigasample-per-Second, 8-Bit Data Acquisition System for a Sampling Digital Oscilloscope. Within the HP 54720/10 acquisition system are sixteen separate sampling and digitizing paths that can be allocated by the user to capture 16K samples at 8 GSa/s or 256K samples at 500 MSa/s or any of various other combinations of sample rate and memory depth. The sample-and-filter sampling technique is an alternative to the conventional sample-and-hold and track-and-hold techniques, by Patrick J. Byrne, Michael T. McTigue, pg 11-23

A Digitizing Oscilloscope Time Base and Trigger System Optimized for Throughput and Low Jitter. Careful attention to low-noise coupling results in robust performance far exceeding what is normally considered possible with off-the-shelf ECL. A new interpolator design increases resolution by a factor of ten, reduces conversion time by a factor of five, and reduces jitter by a factor of more than three compared with previous designs, by Reginald Kellum, Donald A. Whiteman, David D. Eskeldson, pg 24-30. 54720/10.

A Rugged 2.5-GHz Active Oscilloscope Probe. Superior electrical performance is maintained by suspending a fragile electrical structure inside a rugged package and isolating the fragile parts from external abuse. The design required numerous trade-offs between performance, durability, aesthetics, and cost, with performance and ruggedness the primary goals, by Thomas F. Uhling, John R. Sterner, pg 31-37. 54701A.

Accuracy in Interleaved ADC Systems. The overall performance of the HP 54720 oscilloscope is the result of the synergistic effects of calibration, signal preconditioning, and data postprocessing, by Allen Montijo, Kenneth Rush, pg 38-46

Dither and Bits, by Kenneth Rush, pg 42-43

Filter Design for Interpolation, by Allen Montijo, pg 45

A Study of Pulse Parameter Accuracy in Real Time Digitizing Oscilloscope Measurements. Using the well-characterized 50-GHz HP 54124T oscilloscope as a standard, HP 54720A oscilloscope errors were measured for single-shot step rise time, pulse width, and pulse height measurements. The results suggest that the errors have systematic or bias components that may be characterizable and correctable, by Kenneth Rush, pg 47-50

Architectural Design for a Modular Oscilloscope System. Optimum allocation of tasks to various software and hardware subsystems, a separate display processor, multiple lookthrough tables, flicker reduction techniques, and other design features support the performance of the HP 54720/10 oscilloscope and establish it as a platform for the future, by Christopher J. Magnuson, Dana L. Johnson, pg 51-58

A Survey of Processes Used in the Development of Firmware for a Multiprocessor Embedded System. In using structured design methods to develop a large multiprocessor embedded system, the HP 54720/10 oscilloscope design team learned that these methodologies can be very helpful if applied appropriately and supplemented with a few other processes and tools, by Christopher P. Duff, David W. Long, pg 59-65

Developing Extensible Firmware, by Rodney T. Schlater, pg 64-65

Mechanical Design of a New Oscilloscope Mainframe for Optimum Performance. A completely new mainframe design for the HP 54720/10 oscilloscopes includes a unibody chassis and four plug-in slots that provide superior EMI performance and anticipate future enhancements, by Wayne F. Helgoth, John W. Campbell, Kenneth W. Johnson, William H. Escovitz, pg 66-72

A Probe Fixture for Wafer Testing High-Performance Data Acquisition Integrated Circuits. This new probe fixture offers both a wide bandwidth and a high probe count, along with flexible interfacing and low maintenance. The fixture is used to perform at-speed wafer testing of the data acquisition circuits for the HP 54720/10 oscilloscope, by Daniel T. Hamling, pg 73-75

A High-Performance 1.8-GHz Vector Network and Spectrum Analyzer. Network and spectrum analyzers are frequently used together for RF component and circuit evaluation. The HP 4396A vector network and spectrum analyzer exploits this natural union by combining the two measurement modes into one instrument, by Akira Nukiyama, Shigeru Kawabata, pg 76-84

Receiver Design for a Combined RF Network and Spectrum Analyzer. A low noise floor, reduction of distortion and local oscillator feedthrough, and removal of image frequencies and higher-order harmonic products were the main design objectives for the HP 4396A receiver, by Yoshiyuki Yanagimoto, pg 85-94

DSP Techniques for Digital IF, by Akira Nukiyama, pg 90-91

A Fast-Switching, High-Isolation Multiplexer. A three-channel multiplexer with 140-dB isolation between channels, fast switching transient settling time, steady low return loss, and low noise and distortion provide the front end to the single receiver of the HP 4396A network and spectrum analyzer, by Yoshiyuki Yanagimoto, pg 95-99

A 10-Megasample-per-Second Analog-to-Digital Converter with Filter and Memory. In addition to analog-to-digital conversion, the HP E1430A addresses the problems of gain ranging, anti-aliasing protection, frequency band selection, triggering, data buffering and multichannel synchronization, by Howard E. Hilton, pg 100-104

A 10-MHz Analog-to-Digital Converter with 1100-dB Linearity. A classification outline is presented for the errors found in an analog-to-digital converter (ADC). A comparative analysis is done of errors caused by random noise, nonlinearities, and finite amplitude resolution (quantizing errors). An ADC implementation is presented that substantially reduces the nonlinearity errors and virtually eliminates the quantizing errors, by Howard E. Hilton, pg 105-112

Authors October 1993: John A. Scharrer, Michael [Mike] T. McTigue, Patrick J. Byrne, David D. Eskeldson, Reginald [Reggie] Kellum, Donald [Don] A. Whiteman, Thomas [Tom] F. Uhling, John R. Sterner, Allen Montijo, Kenneth [Ken] Rush, Dana L. Johnson, Christopher [Chris] J. Magnuson, David W. Long, Christopher [Chris] P. Duff, John W. Campbell, Kenneth [Kenny] W. Johnson, Wayne F. Helgoth, William [Bill] H. Escovitz, Daniel [Dan] T. Hamling, Shigeru Kawabata, Akira [Nuki] Nukiyama, Yoshiyuki [Yoshi] Yanagimoto, Howard E. Hilton, pg 113-115

December 1993 v.44 n.6

Cover: This spectrogram display represents more than 300 spectrum measurements covering the first 20 milliseconds of the turn-on-transient of a marine-band handheld transmitter

Vector Signal Analyzers for Difficult Measurements on Time-Varying and Complex Modulated Signals. Called vector analyzers for their ability to quadrature detect an input signal and measure its magnitude and phase, these new analyzers offer conventional spectrum analysis capabilities along with a full set of measurement based on digital signal processing. The three-processor architecture includes a frequency selective front end and a digital IF section, by Kenneth J. Blue, Robert T. Cutler, Dennis P. O’Brien Douglas R. Wagner, Benjamin R. Zarlingo, pg 6-16

The Resampling Process, by Robert T. Cutler, pg 10

Applications for Demodulation, by Timothy L. Hillstrom, pg 12-13

A Firmware Architecture for Multiple High-Performance Measurements. The HP 894xxA vector signal analyzers perform fast, sophisticated measurements on complex waveforms. The firmware architecture provides access to multiple processors to meet the high-performance requirements while allowing individual measurements to share common features and protocol, by Dennis P. O’Brien, pg 17-30

Run-Time Configurable Hardware Drivers, by Glenn R. Engel, pg 20-21

Remote Debugging, by Glenn R. Engel, pg 29

Baseband Vector Signal Analyzer Hardware Design. The HP 89410A combines superior front-end linearity and high-speed data conversion with powerful digital signal processing to provide advanced measurement capabilities. Extensive calibration, flexible triggering and arbitrary source types provide the accuracy and versatility needed to make the sophisticated measurements required for complex signal analysis at RF information bandwidths, by David F. Kelley, Joseph R. Diederichs, Manfred Bartz, Keith A. Bayern, pg 31-46

ADC Bits, Distortion, and Dynamic Range, by Manfred Bartz, pg 38-39

What Is Dithering?, by Manfred Bartz, pg 44-45

RF Vector Signal Analyzer Hardware Design. Based on the HP 89410A baseband vector signal analyzer, the HP 89440A RF vector signal analyzer extends the frequency range of both receiver and source to 1.8 GHz with a 7-MHz information bandwidth. All of the vector capabilities of the 10-MHz baseband instrument (up to a 7-MHz information bandwidth) can be translated to any frequency from 0 to 1.8 GHz, by Timothy L. Hillstrom, James Pietsch, Roy L. Mason, William J. Ginder, Kevin L. Johnson, Robert T. Cutler, pg 47-59

Microwave Plate Assembly, by Roy L. Mason, pg 50

A Versatile Tracking and Arbitrary Source, by Don Hiller, pg 54-55

Vector Measurements beyond 1.8 GHz, by Joe Tarantino, pg 58

Optical Spectrum Analyzers with High Dynamic Range and Excellent Input Sensitivity. The diffraction-grating-based HP 71450A and 71451A optical spectrum analyzers provide the basic spectral measurement of optical power versus wavelength, and advanced functions for measuring and characterizing LEDs, DFB Lasers, and Fabry-Perot lasers, by David A. Bailey, James R. Stimple, pg 60-67

Optical Spectrum Analysis, pg 62

A Double-Pass Monochromator for Wavelength Selection in an Optical Spectrum Analyzer. The wavelength-selection scheme used in the HP 71450A and HP 71451A optical spectrum analyzers propagates the light from the device under test twice through the refraction and diffraction elements in the monochromator, by Kenneth R. Wildnauer, Zoltan Azary, pg 68-74

Diffraction Grating, pg 70

Polarization Sensitivity, pg 71

A High-Resolution Direct-Drive Diffraction Grating Rotation System. Creating a high-resolution, high-speed positioning system that can provide over two million data points per revolution of the diffraction grating required a design that is much different from the gear-reduction positioning systems typically used in optical spectrum analyzers, by Joseph N. West, J. Douglas Knight, pg 75-79. 71450A, 71451A.

A Two-Axis Micropositioner for Optical Fiber Alignment. A positioning system with submicron resolution is used to keep the output fiber accurately aligned with the light coming out of the monochromator during movement of the diffraction grating, by J. Douglas Knight, Joseph N. West, pg 80-84. 71450A, 71451A.

A Standard Data Format for Instrument Data Interchange. This standard format allows many HP analyzers to exchange data with each other and with applications software. Utilities provide data conversion, editing, viewing, and plotting and a function library provides access to SDF data from programs, by Michael L. Hall, pg 85-89. SDF.

North American Cellular CDMA. Code division multiple access (CDMA) is a class of modulation that uses specialized codes to provide multiple communication channels in a designated segment of the electromagnetic spectrum. This article describes the implementation of CDMA that has been standardized by the Telecommunications Industry Association for the North American cellular telephone system, by David P. Whipple, pg 90-97

Cellular Technologies, pg 92

DECT Measurements with a Microwave Spectrum Analyzer. An HP 8590 E-Series spectrum analyzer with DECT source, demodulator, and measurement personality can be used to provide a cost-effective solution to development, manufacturing, and pre-type-approval testing for compliance with the Digital European Cordless Telecommunications standard, by Mark A. Elo, pg 98-106

Index: Volume 44 January 1993 through December 1993. PART 1: Chronological Index, pg 107-109. PART 2: Subject Index, pg 109-113. PART 3: Product Index, pg 113. PART 4: Author Index, pg 114-115

Authors December 1993: Kenneth [Ken] J. Blue, Robert [Bob] T. Cutler, Douglas [Doug] R. Wagner, Benjamin [Ben] R. Zarlingo, Dennis P. O’Brien, Manfred Bartz, Keith A. Bayern, Joseph [Joe] R. Diederichs, David [Dave] F. Kelley, William [Bill] J. Ginder, Timothy [Tim] L. Hillstrom, Kevin L. Johnson, Roy L. Mason, James [Jim] K. Pietsch, David [Dave] A. Bailey, James [Jim] R. Stimple, Kenneth [Kenn] R. Wildnauer, Zoltan Azary, Joseph [Joe] N. West, J. Douglas [Doug] Knight, Michael [Mike]

February 1992 v.43 n.1

Cover: An artist’s rendition of an analog oscilloscope display and an HP 54600A oscilloscope display of the output of a circuit designed to synchronize an asynchronous event such as a keypress to a microprocessor clock.

Low-Cost, 100-MHz Digitizing Oscilloscopes. The HP 54600 Series oscilloscopes combine the convenience, familiarity, and display responsiveness of analog oscilloscopes with the features, accuracy, and measurement power of a digital architecture, by Robert A. Witte, pg 6-11

A High Throughput Acquisition Architecture for a 100-MHz Digitizing Oscilloscope. Two custom integrated circuits offload functions from the system microprocessor to increase waveform throughput and give the HP 54600 digitizing oscilloscopes the “look and feel” of an analog oscilloscope, by Daniel P. Timm, Matthew S. Holcomb, pg 11-20

Sample Rate and Display Rate in Digitizing Oscilloscopes, by Robert A. Witte, pg 18-19

A Fast, Built-In Test System for Oscilloscope Manufacturing. Following a verification strategy instead of a screening or characterization strategy, a special module was designed to replace the computer input/output option module of the HP 54600 Series oscilloscopes. The resulting test system has reduced both equipment costs and test times to one tenth those of previous test systems, by Stuart O. Hall, Jay A. Alexander, pg 21-28

Verification Strategy, pg 22

Stimulus/Response Defect Diagnosis in Production, by Chris J. Magnuson, pg 27

Measuring Frequency Response and Effective Bits Using Digital Signal Processing Techniques. Frequency response and effective bits are informative measurements of digital oscilloscope performance, and can be calculated by efficient algorithms using the fast Fourier transform, by Martin B. Grove, pg 29-35. 54600A, 54601A.

Calculating Effective Bits from Signal-to-Noise Ratio, pg 34

Mechanical Design of the HP 54600 Series Oscilloscopes. Simplicity of manufacture and a minimum of parts were the approaches taken to achieve high quality and reliability. Robotic assembly wasn’t a consideration, so rotating motions were often chosen to mate components in final assembly, by Robin P. Yergenson, Timothy A. Figge, pg 36-40

EMC Design of the HP 54600 Series Oscilloscopes. By a combination of electronic circuit design and mechanical shielding techniques, the design meets German FTZ standards and, with optional shielding, most U.S. military standards for electromagnetic compatibility, by Kenneth D. Wyatt, pg 41-45

Digital Oscilloscope Persistence. Autostore, a storage technique for monochrome digital storage oscilloscopes, displays historical traces at half intensity and the most recent, or live, trace at full intensity. The technique allows new ways of viewing signals, by James A. Kahkoska, pg 45-47

A High-Resolution, Multichannel Digital-to-Analog Converter for Digital Oscilloscopes. This 16-bit, 16 channel DAC is used for microprocessor adjustment of fourteen dc signals that control the analog section of the main oscilloscope board in the HP 54601A digitizing oscilloscope. It also provides a high-accuracy dc reference for calibrating the vertical gain, by Grosvenor H. Garnett, pg 48-56

Using the High Resolution, Multichannel DAC in the HP 54601A Oscilloscope, by Mark P. Schnaible, pg 54-55

Comparing Analog and Digital Oscilloscopes for Troubleshooting. The analog oscilloscope has remained the troubleshooter’s instrument of choice even though the digital oscilloscope has replaced it for laboratory analysis. However, the analog oscilloscope has limitations, especially in digital troubleshooting, by Jerald B. Murphy, pg 57-59. 54600.

Authors February 1992: Robert [Bob] A. White, Mathew [Matt] S. Holcomb, Daniel [Dan] P. Timm, Stuart O. Hall, Jay A. Alexander, Martin [Marty] B. Grove, Robin [Rob] P. Vergenson, Timothy [Tim] A. Figge, Kenneth [Ken] D. Wyatt, James A. Kahkoska, Grosvenor [Grove] H. Garnett, Jerald [Jerry] B. Murphy, John McShane, William [Bill] W. Crandall, pg 60-61

An Introduction to Neural Nets. Unlike conventional algorithms, neural net algorithms can learn the mapping between input and output. Neural nets represent information in a distributed, rather than local, way, and can have different topologies depending on the application. This paper explains these features, lists major application areas, and briefly discusses hardware and software for development, by John McShane, pg 62-65

Design Challenges for Distributed LAN Analysis. The design of a distributed local area network management system is primarily a problem of data reduction, data transmission, and data presentation. HP ProbeView software and LanProbe monitors continuously monitor the health of an Ethernet or IEEE 802.3 network to allow the diagnosis of complicated problems without dispatched equipment, by William W. Crandall, pg 66-76

Poor Network Partitioning, pg 76

April 1992 v.43 n.2

Cover: A view of a VXIbus module and the backplane of a VXIbus mainframe

VXIbus: A Standard for Test and Measurement System Architecture. The VXIbus standard defines an open architecture that allows instrumentation and processors from various manufacturers to operate together within a single chassis or mainframe, by Lawrence A. DesJardin, pg 6-14. VMEbus.

The HP VXIbus Mainframes, pg 9-10

VXIbus Terminology, pg 13

The VXIbus From an Instrument Designer’s Perspective. HP has defined a set of internal standards to compensate for some missing aspects of the VXIbus standard that are critical to instrument design, by Gregory A. Hill, Steven J. Narciso, pg 15-23. IEEE 488.2.

Examples of Message-Based VXIbus Instruments, by Don Smith, Harald Mattes, Helmut Sennewald, Tony Lymer, pg 20-21

Small, Low Cost Mainframe with a Register-Based Interface, by Von Campbell, pg 22

Design of Mainframe Firmware in an Open Architecture Environment. Compatibility, portability, expandability, usability, scalability, and compliance with SCPI are some of the attributes designed into HP’s VXIbus mainframe firmware, by Paul B. Worrell, pg 24-28

Real Time Multitasking of Instruments in the VXIbus Command Modules. The operating system in HP’s command modules uses two reentrant processes to handle communication between the user and instruments on the VXIbus, by Christopher P. Kelly, pg 29-34

VXI Programming in C. A library of C functions provides functionality that makes it easier for test program developers to create applications that communicate with HP-IB and VXIbus instruments, by Lee Atchison, pg 35-40

Achieving High Throughput with Register-Based Dense Matrix Relay Modules. With an onboard FIFO buffer and register-based programming, HP’s VXIbus dense matrix relay modules provide high throughput and a downsized, low-cost solution to matrix switching, by James B. Durr, Sam S. Tsai, pg 41-51. E1465A, E1466A, E1467A.

Mass Interconnect for VXIbus Systems. The HP 75000 family of VXIbus products includes a set of interconnect hardware that enables automatic test system developers to mount DUTs easily to HP’s VXIbus mainframe, by Calvin L. Erickson, pg 52-58

A Manufacturing-Oriented Digital Stimulus/Response Test Instrument. This digital functional tester consists of pattern I/0, timing, and command modules configured in a VXIbus mainframe. The maximum pattern rate is 20 MHz and pin-to-pin skew is less than 6 ns, by David P. Kjosness, pg 59-68. 75000 Model D20.

Digital Test Development Software for a VXIbus Tester. This software provides ease of use and direct control for the complex hardware of the HP 75000 Model D20 tester. It uses a spreadsheet paradigm and separates the programming of pattern data from that of timing, by Kenneth A. Ward, pg 69-74. E1496A.

The VXIbus in a Manufacturing Test Environment. Engineers at HP’s Loveland Instrument Division have found that using the VXIbus and the SCPI programming language provides benefits such as reduced test development time and system support costs, by Larry L. Carlson, Wayne H. Willis, pg 75-77. SCPI, Standard Commands for Programmable Instruments.

Authors April 1992: Lawrence [Larry] A. DesJardin, Gregory [Greg] A. Hill, Steven [Steve] J. Narciso, Paul B. Worrell, Christopher [Chris] P. Kelly, Lee Atchison, James [Jim] B. Durr, Sam S. Tsai, Calvin L. Erickson, David [Dave] P. Kjosness, Kenneth [Ken] A. Ward, Wayne H. Willis, Larry L. Carlson, Bieter Scherer, William [Bill] E. Strasser, James [Jim] D. McVey, Wayne M. Kelly, Michael [Mike] C. Fischer, Michael [Mike] J. Schoessow, Peter Tong, David [Dave] L. Barnard, James [Jim] A. Thalmann, Henry Black, Koichi Yanagawa, Michael [Mike] P. Moore, Eric N. Gullerud, pg 77-80

The Peak Power Analyzer, a New Microwave Tool. Gallium arsenide sensor design, a new calibration approach, switched amplification and processing of the envelope signals, leveraged digital oscilloscope technology, and microprocessor control provide calibration-free, accurate pulsed microwave power measurements, by Wayne M. Kelly, William E. Strasser, James D. McVey, Dieter Scherer, pg 81-89

Multilayer Shielding Protects Microvolt Signals in High-Interference Environment, by James L. Bertsch, Charles W. Cook, pg 84

GaAs Technology in Sensor and Baseband Design. In the HP 8990A peak power analyzer design, the detector diodes for the sensors are GaAs planar doped barrier diodes, and the switches in the switchable-gain baseband amplifier use GaAs FETs, by Michael J. Schoessow, Michael C. Fischer, Peter Tong, pg 90-94

Harmonic Errors and Average versus Peak Detection, by Michael C. Fischer, pg 94

Automatic Calibration for Easy and Accurate Power Measurements. Changes in input power, carrier frequency, and sensor temperature are automatically compensated for. The user is not required to disconnect the sensor from the device under test and connect it to a calibration source, by James A. Thalmann, David L. Barnard, Henry Black, pg 95-100. 8990A.

Testing the Peak Power Analyzer Firmware, by Jayesh K. Shah, pg 99

An Advanced 5-Hz-to-500-MHz Network Analyzer with High Speed, Accuracy, and Dynamic Range. A three-processor design provides a measurement speed of 400 microseconds per point, fast enough to keep up with manual adjustments. Maximum frequency resolution is 0.001 Hz. Dynamic accuracy is ±0.05 dB in amplitude and ±0.3 degree in phase. Sensitivity of the three receiver channels is -130 dBm, and dynamic range is 110 dB or 130 dB, depending on the sweep mode, by Koichi Yanagawa, pg 101-109. 8751A.

A High-Performance Measurement Coprocessor for Personal Computers. This plug-in card brings test and measurement coprocessing power to ISA (Industry Standard Architecture) personal computers with greater calculation speed and better HP-IB performance than its predecessor. It also has DMA capability, by Mike Moore, Eric N. Gullerud, pg 110-116. 82324A.

Measurement Coprocessor ASIC, pg 112-113

Measurement Coprocessor History, pg 114

June 1992 v.43 n.3

Cover: An artist rendition of the transformation that take place when source code through register reassociation and software pipelining compiler optimizations

HP-UX Operating System Kernel Support for the HP 9000 Series 700 Workstations. Because much of the Series 700 hardware design was influenced by the system’s software architecture, engineers working on the kernel code were able to make changes to the kernel that significantly improved overall system performance, by Jeffrey R. Glasson, Karen Kerschen, pg 6-10

An Example of the FTEST Instruction, pg 10

Providing HP-UX Kernel Functionality on a New PA-RISC Architecture. To ensure customer satisfaction and produce a high-performance, high-quality workstation on a very aggressive schedule, a special management structure, a minimum product feature set, and a modified development process were established, by Dawn L. Yamine, Donald E. Bollinger, Frank P. Lemmon, pg 11-14. 9000 Series 700.

New Optimizations for PA-RISC Compilers. Extensions to the PA-RISC architecture exposed opportunities for code optimizations that enable compilers to produce code that significantly boosts the performance of applications running on PA-RISC machines, by Robert C. Hansen, pg 15-23

Link Time Optimizations, by Carl Burch, pg 22

HP 9000 Series 700 FORTRAN Optimizing Preprocessor. By combining HP design engineering and quality assurance capabilities with a well-established third party product, the performance of Series 700 FORTRAN programs, as measured by key workstation benchmarks, was improved by more than 30%, by Daniel J. Magenheimer, Alan C. Meyer, Sue A. Meloy, Robert A. Gottlieb, pg 24-32

Vector Library, pg 29-30

Register Reassociation in PA-RISC Compilers. Optimization techniques added to PA-RISC compilers result in the use of fewer machine instructions to handle program loops, by Vatsa Santhanam, pg 33-38

Software Pipelining in the PA-RISC Compilers. The performance of programs with loops can be improved by having the compiler generate code that overlaps instructions from multiple iterations to exploit the available instruction-level parallelism, by Sridhar Ramakrishnan, pg 39-45

Shared Libraries for HP-UX. Transparency is the main contribution of the PA-RISC shared library implementation. Most users can begin using shared libraries without making any significant changes to their existing applications, by Michelle A. Ruscetta, Cary A. Coutant, pg 46-53

Deferred Binding, Relocation, and Initialization of Shared Library Data, by Marc Sabatella, pg 52

Integrating an Electronic Dictionary into a Natural Language Processing System. This paper discusses the types of electronic dictionaries available and the trends in electronic dictionary technology, and provides detailed discussion of particular dictionaries. It describes the incorporation of one of the electronic dictionaries into Hewlett-Packard’s natural language understanding system and discusses various computer applications that could use the technology now available, by Diana C. Roberts, pg 54-65

Authors June 1992:  Karen Kerschen, Jeffrey R. Glasson, Frank P. Lemmon, Donald [Don] E. Bollinger, Dawn L. Yamine, Robert [Bob] C. Hansen, Daniel [Dan] J. Magenheimer, Robert [Bob] A. Gottlieb, Alan C. Meyer, Sue A. Meloy, Vatsa Santhanam, Sridhar Ramakrishnan, Cary A. Coutant, Michelle A. Ruscetta, Diana C. Roberts, Dale D. Russell, Susan S. Spach, Ronald [Ron] W. Pulleyblank, pg 65-67

Application of Spatial Frequency Methods to Evaluation of Printed Images. Contrast transfer function methods, applied in pairwise comparisons, differentiated between print algorithms, dot sizes, stroke widths, resolutions (dpi), smoothing algorithms, and toners. Machine judgments based on these methods agreed with the print quality judgment of a panel of trained human observers, by Dale D. Russell, pg 68-75

Parallel Raytraced Image Generation. Simulations of an experimental parallel processor architecture have demonstrated that four processors can provide a threefold improvement in raytraced image rendering speed compared to sequential rendering, by Ronald W. Pulleyblank, Susan S. Spach, pg 76-83

August 1992 v.43 n.4

Cover: The PCX-S chipset for the Apollo 9000 Series 700 workstations includes a CPU, a floating-point-co-processor, and a memory and system bus controller

Midrange PA-RISC Workstations with Price/Performance Leadership. The HP 9000 Models 720, 730 and 750 workstations achieve exceptional performance ratings on industry-standard benchmarks through a combination of a high CPU clock rate (up to 66 MHz) and tuning of the subsystem, compiler, and operating system designs. This article presents an overview of the hardware design, by Andrew J. DeBaets, Kathleen M. Wheeler, pg 6-11

HP 9000 Series 700 Workstation Firmware, by Deborah A. Savage, pg 9

VLSI Circuits for Low-End and Midrange PA-RISC Computers. The major VLSI chips for the HP 9000 Series 700 workstations include a central processing unit with 577,000 transistors, a floating-point coprocessor with 640,000 transistors, and a memory and input/output controller with 185,000 transistors, by Thomas O. Meyer, Craig A. Gleason, Mark A. Forsyth, Leith Johnson, Steven T. Mangelsdorf, pg 12-22

PA-RISC Performance Modeling and Simulation, by Richard G. Fowles, pg 21

ECL Clocks for High-Performance RISC Workstations. In the HP 9000 Series 700 workstations, clock signals are distributed using differential ECL circuits, and the VLSI chips have CMOS inputs operating at ECL levels. Critical clock delay signals are routed on 50-ohm striplines on printed circuits board inner layers, by Frank J. Lettang, pg 23-25

HP 9000 Series 700 Input/Output Subsystem. Integrated on a single 8.5-by-11 inch I/0 board is hardware support for the SCSI, the Centronics parallel printer interface, two RS-232 ports, the IEEE 802.3 LAN, the HP-HIL, four audio tone generators, and a real-time clock. An application-specific IC serves as I/0 subsystem controller, by Daniel Li, Audrey B. Gore, pg 26-33

Design Verification of the HP 9000 Series 700 PA-RISC Workstations. First a high-level system model was stimulated and compared with a reference machine running both HP standard and pseudorandom test programs. Then the same tests were run on hardware prototypes. All chips were able to boot the operating system on first silicon, by Steve W. LaMar, Gregory D. Burroughs, Ali M. Ahi, Chi-Yen R. Lin, Audrey B. Gore, Alan L. Wiemann, pg 34-42

HP Standard PA-RISC Test Programs, pg 35

Simulation Toolset, pg 36

Debugging Tools, pg 39

Metrics, pg 41

Mechanical Design of the HP 9000 Models 720 and 730 Workstations. The CPU board, I/0 board, graphics board, power supply, mass storage tray, and EISA board assembly are designed as easily accessible modules to support the design goals of low cost, accessibility, serviceability, and manufacturability. The appearance is new, attractive, and compatible with existing HP computer products, by John P. Hoppal, Arlen L. Roesner, pg 43-48

Meeting Manufacturing Challenges for PA-RISC Workstations. To meet the time-to-market goals for the HP 9000 Series 700 workstations, major contributions were made in design for manufacturability and in expediting standard processes. One manufacturing operation installed a new surface mount production facility and developed a new printed circuit production process simultaneously, by Kevin W. Allen, Paul Roeber, Samuel K. Hammel, Spencer M. Ure, Anna M. Hargis, pg 49-54

High-Performance Designs for the Low-Cost PA-RISC Desktop. This paper presents the processor, memory, graphics, multimedia, and built-in core I/0 design of the new HP 9000 Models 705 and 710 entry-level, scalable PA-RISC workstations. The use of a buffered CPU/memory interconnect is important for scaling the high-frequency, high-performance processor design to the entry-level desktop, by John A. Dykstal, Don C. Soltis, Jr., Robert J. Hammond, Craig R. Frink, pg 55-63

Low-Cost Plain-Paper Color Inkjet Printing. The HP DeskWriter C and DeskJet 500C are based on advanced thermal inkjet technology in the form of a 300-dpi three-color inkjet print cartridge. The printers and software drivers that use this cartridge were developed on an aggressive one-year schedule, by Daniel A. Kearl, Michael S. Ard, pg 64-68

Thermal Inkjet Review, or How Do Dots Get from the Pen to the Page, by James P. Shields, pg 67

Ink and Print Cartridge Development for the HP DeskJet 500C/DeskWriter C Printer Family. A new trichamber print cartridge allows the low-cost HP DeskJet printer platform to print in color. The ink vehicle, dyes, dye concentrations, and interactions had to be carefully traded off to optimize performance with respect to color bleed, color saturation, composite black production, edge acuity, drying time, and resistance to crusting, by Daniel A. Kearl, Loren E. Johnson, Craig Maze, James P. Shields, pg 69-76

Color Science in Three Color Inkjet Print Cartridge Development, by John M. Skene, pg 71-72

Making HP Print Cartridges Safe for Consumers Around the World, by Michael L. Holcomb, pg 76

Automated Assembly of the HP DeskJet 500C/DeskWriter C Color Print Cartridge. Roughly 60% of the assembly technology had to be developed especially for the color print cartridge. Plastic welding, adhesive dispensing, TAB circuit staking, and ink fill were among the challenges, by Mark C. Huth, Lee S. Mason, pg 77-83

Color Inkjet Print Cartridge Ink Manifold Design, by Gregory W. Blythe, pg 82-83

Adhesive Material and Equipment Selection for the HP DeskJet 500C/DeskWriter C Color Print Cartridge. The adhesive joins the printhead to the cartridge body and maintains color ink separation at the interface. The encapsulant protects the electrical bonds. Special equipment was designed to dispense these materials with high precision in very small volumes, by Terry M. Lambright, Douglas J. Reed, pg 84-86

Machine Vision in Color Print Cartridge Production. In production of the tricolor print cartridges for the HP DeskJet 500C and DeskWriter C printers, machine version is used for filter stake inspection, adhesive and encapsulant dispenser calibration, structural adhesive inspection, and automatic print quality evaluation, by Michael J. Monroe, pg 87-92

HP DeskWriter C Printer Driver Development. Running on the host computer, the driver provides all of the intelligent formatting, rasterizing, color matching, and dithering for this affordable black and color printer, by William J. Allen, Steven O. Miller, Toni D. Courville, pg 93-102

An Interactive User Interface for Material Requirements Planning. For planners and buyers in the manufacturing business environment, HP MRP Action Manager is an online, interactive tool that automates many of the traditional paper-intensive activities of material requirements planning, by Barbara J. Williams, Alvina Y. Nishimoto, William J. Gray, pg 103-110. Action Manager for NewWave.

HP MRP Action Manager Project Management, pg 108

Authors August 1992: Andrew [Andy] J. DeBaets, Kathleen [Kathy] M. Wheeler, Mark A. Forsyth, Craig A. Gleason, Leith Johnson, Steven [Steve] T. Mangelsdorf, Thomas [Tom] O. Meyer, Frank J. Lettang, Daniel Li, Ali M. Ahi, Gregory [Greg] D. Burroughs, Audrey B. Gore, Steve W. LaMar, Chi-Yen [Robert] R. Lin,  Alan L. Wiemann, John P. Hoppal, Arlen L. Roesner, Kevin W. Allen, Samuel [Kelley] K. Hammel, Anna Marie Hargis, Paul Roeber, Spencer [Spence] M. Ure, John A. Dykstal, Craig R. Frink, Robert [Bob] J. Hammond,  Don C. Soltis, Jr., Daniel [Dan] A. Kearl, Michael [Mike] S. Ard, Craig Maze, Loren E. Johnson, James [Jay] P. Shields, Lee S. Mason, Mark C. Huth, Douglas [Doug] J. Reed, Terry M. Lambright, Michael [Mike] J. Monroe, William [Will] J. Allen, Toni D. Courville, Steven O. Miller, Alvina Y. Nishimoto, William [Bill] J. Gray, Barbara J. Williams, pg 111-115

October 1992 v. 43 n.5

Cover: the HP 4980 Network Advisor can be connected to a network like any other node to monitor the health of the network. This rendition depicts a token ring network with several workstations and the Network Advisor connected to it.

The HP Network Advisor: A Portable Test Tool for Protocol Analysis. This network protocol analysis tool combines expert system technology with a comprehensive set of network statistics and protocol decodes to speed problem resolution for token ring and Ethernet network, by Edmund G. Moore, pg 6-10. 4980.

Network Advisor Product Enhancement Philosophy, pg 9

Embedding Artificial Intelligence in a LAN Test Instrument. The knowledge and processes used by a skilled LAN troubleshooter are built into an interactive expert system application that runs on HP 4980 Series Network Advisor protocol analyzers, by Rod Unverrich, Stephen Witt, Scott Godlew, pg 11-21. 4980.

The User Interface for the HP 4980 Network Advisor Protocol Analyzer. A PC-based, object-oriented software architecture forms the underpinning for the HP 4980 Network Advisor’s user interface, by Thomas A. Doumas, pg 22-28

Object-Oriented Design and Smalltalk, pg 24

The Forth Interpreter, by Robert L. Vixie, pg 24

The Network Advisor Analysis and Real-Time Environment. The user interface and protocol decode applications of the HP 4980 Network Advisor use the services of a software platform that provides real-time protocol analysis and an interface to the network under test, by Sunil Bhat, pg 29-33

Network Advisor Protocol Analysis: Decodes. The decodes feature of the Network Advisor allows users to traverse from a high-level summary of protocol information to a bit-level interpretation of the protocol data, by Rona J. Prufer, pg 34-40. 4980.

Mechanical Design of the HP 4980 Network Advisor. The package design for the Network Advisor was guided by the electrical, mechanical, and ergonomic requirements of a PC-based protocol analyzer, by Kenneth R. Krebs, pg 41-47

The Microwave Transition Analyzer: A New Instrument Architecture for Component and Signal Analysis. The microwave transition analyzer brings time-domain analysis to RF and microwave component engineers. A very wide-bandwidth, dual-channel front end, a precisely uniform sampling interval, and powerful digital signal processing provide unprecedented measurement flexibility, including the ability to measure magnitude and phase transitions as fast as 25 picoseconds, by David J. Ballo, John A. Wendler, pg 48-62

Frequency Translation as Convolution, pg 61

Design Considerations in the Microwave Transition Analyzer. Digital signal processing is used extensively to improve the performance of the microwave sampler, the sample-rate synthesizer and the high-speed analog-to-digital converter, and to extract and display input signal characteristics in both the time domain and the frequency domain, by John A. Wendler, Michael Dethlefsen, pg 63-71. 71500A.

A Visual Engineering Environment for Test Software Development. Software development for computer-automated testing is dramatically eased by HP VEE, which allows a problem to be expressed on the computer using the conceptual model most common to the technical user: the block diagram, by Douglas C. Beethe, William L. Hunt, pg 72-77. VEE.

Object-Oriented Programming in a Large System, by William L. Hunt, pg 76

Developing an Advanced User Interface for HP VEE. Simplicity and flexibility were the primary attributes that guided the user interface development. Test programs generated with HP VEE can have the same advanced user interface as HP VEE itself, by William L. Hunt, pg 78-83. Visual Engineering Environment.

HP VEE: A Dataflow Architecture. HP VEE is an object-oriented implementation. Its architecture strictly separates views from the underlying models. There are two types of models: data models and device models. Special devices allow users to construct composite devices, by Douglas C. Beethe, pg 84-88. Visual Engineering Environment.

A Performance Monitoring System for Digital Telecommunications Networks. This system collects CCITT G.821 performance statistics on CEPT 2, 8, 34, and 140-Mbit/s data streams and alarm data on network elements. A demux capability permits monitoring of tributary streams within a data stream. Data is collected nonintrusively by peripheral units, which are modular VXIbus systems, by Alberto Vallerini, Fernando M. Secco, Giovanni Nieddu, pg 89-99. E3560.

Authors October 1992: Edmund [Ed] G. Moore, Scott Godlew, Rod Unverrich, Stephen [Steve] Witt, Thomas [Tom] A. Doumas, Sunil Bhat, Rona J. Prufer, Kenneth [Ken] R. Krebs, David J. Ballo, John A. Wendler, Michael [Mike] Dethlefsen, Douglas [Doug] C. Beethe, William [Bill] L. Hunt, Giovanni [Gianni] Nieddu, Fernando M. Secco, Alberto Vallerini, Chu-Sun [Chu] Yen, Richard [Rick] C. Walker, Patrick [Pat] T. Petruno, Cheryl Stout, Benny W. H. Lai, William [Bill] J. McFarland, pg 100-102

G-Link: A Chipset for Gigabit-Rate Data Communication. Two easy-to-use IC chips convert parallel data for transmission over high-speed serial links. A special encoding algorithm ensures dc balance in the transmitted data stream. A binary-quantized phase-locked loop is used for clock recovery. An on-chip state machine manages link startup automatically, by Cheryl Stout, William J. McFarland, Richard C. Walker, Benny W. H. Lai, Chu-Sun Yen, Patrick T. Petruno, pg 103-116

Bang-Bang Loop Analysis, by Richard W. Walker, pg 110

December 1992 v.43 n.6

Cover: The pen carriage of the HP DesignJet large-format thermal inkjet drafting plotter is shown with a DesignJet plot.

A Large-Format Thermal Inkjet Drafting Plotter. The HP DesignJet drafting plotter combines the low cost of pen plotters with the speed of electrostatic plotters. Throughput is almost independent of drawing complexity. The plotter uses the same roll and sheet media as pen plotters, and in roll mode, automatically cuts and stack plots for unattended operation, by John F. Meyer, Samuel A. Stodder, Robert A. Boeller, Victor T. Escobedo, pg 6-15

DesignJet Plotter User Interface Design: Learning the Hard Way about Human Interaction, by P. Jeffrey Wield, pg 12

Electronic and Firmware Design of the HP DesignJet Drafting Plotter. High-performance vector-to-raster conversion and print engine control are provided by a RISC processor, two single-chip processors, and three custom integrated circuits. Development of the electronics and firmware made extensive use of emulation and simulation, by Anne P. Kadonaga, James R. Schmedake, Iue-Shuenn Chen, Alfred Holt Mebane IV, pg 16-23

Pen Alignment in a Two-Pen, Large-Format, Inkjet Drafting Plotter. Misalignments are found by using a quad photodiode sensor to measure test patterns printed on the media. Scan-direction errors are corrected by timing adjustments. Media-direction errors are corrected algorithmically and mechanically, by Robert D. Haselby, pg 24-27. DesignJet.

DesignJet Plotter Chassis Design: A Concurrent Engineering Challenge. Instead of the expensive prestraightened slider rods used in previous designs to form the guideway for the pen carriage, the DesignJet chassis uses rods that are straightened during assembly and held in place by a low-cost rigid structure. The chassis components, assembly process, and assembly tooling had to be developed concurrently, by Timothy A. Longust, pg 28-31

DesignJet Plotter End Covers Produced by Coinjection, by Steven R. Card, pg 31

DesignJet Plotter Mechanical Architecture Development Process. By investing several months in designer communication before beginning detailed prototype design, an architecture was developed that was subsequently never changed, allowing the project to reach manufacturing release a month early. Costs for most subsystems were lower than expected, by Chuong Ta, David M. Petersen, pg 32-34

Improved Drawing Reliability for Drafting Plotters. The SurePlot drawing system, a feature of the HP DraftMaster Plus drafting plotter, significantly enhances drawing reliability and unattended plotting ability. The system is based on a noncontact color optical line sensor that verifies the writing of the pens, by Isidre Rosello, Joan Uroz, Josep Giralt Adroher, Robert W. Beauchamp, pg 35-41

Average User Plot, pg 36

Acceptable Quality Level Index, pg 37

An Automatic Media Cutter for a Drafting Plotter. This simple, reliable, low-cost cutter is a classical rotating and linear blade design. It requires no separate drive motors and does not interfere with normal plotting performance. To quantify its performance, cut quality parameters and measurement methods were defined, by David Perez, Josep Abella, Ventura Caamano Agrafojo, pg 42-48. DraftMaster Plus.

Definitions and Measurement Procedures for Cut Quality Parameters, pg 46-47

Reengineering of a User Interface for a Drafting Plotter. An existing user interface has been successfully reengineered and plotter usability enhanced by selecting, combining, and adapting software prototype techniques and standard software development methodologies, by Jordi Gonzalez, Jaume Ayats Ardite, Carles Castellsague Pique, pg 49-55. DraftMaster Plus.

A Multiprocessor HP-UX Operating System for HP 9000 Computers. The system supports up to four processors in the HP 9000 Model 870 computer, significantly increasing online transaction processing (OLTP) performance without degrading uniprocessor performance, by Douglas V. Larson, Kyle A. Polychronis, pg 56-61

Next-Generation Multiprocessor HP-UX, pg 58

Advances in Integrated Circuit Packaging: Demountable TAB. State-of-the-art IC packaging, particularly with RISC architecturess, demands performance at a high lead count. This paper presents some of the fundamental topics in IC packaging, formulates the principal criteria by which single-chip IC packages are judged, and evaluates existing industry-standard packages. A new packaging technology is described that addresses the unsatisfied packaging needs of modern digital systems, by Farid Matta, pg 62-77

The EISA Standard for the HP 9000 Series 700 Workstations. The EISA interface on the HP 9000 Series 700 workstations provides a high-performance, expandable architecture that allows peripherals using different I/0 standards to communicate with the system on the same I/0 bus, by Vicente V. Cavanna, Christopher S. Liu, pg 78-82. Extended Industry Standard Architecture.

EISA Cards for the HP 9000 Series 700 Workstations. The EISA specification’s high-performance, burst-cycle protocol for data transfer is provided on the Series 700 EISA cards through the implementation of DMA and EISA bus master interfaces, by David S. Clark, Andrea C. Lantz, Christopher S. Liu, Thomas E. Parker, Joseph H. Steinmetz, pg 83-96. Extended Industry Standard Architecture.

Board-Level Simulation of the Series 700 EISA Cards, pg 94-95

Software for the HP EISA SCSI Card. Two software architectures, one offline and the other online, are used to provide EISA SCSI support for the HP 9000 Series 700 workstations, by Bill Thomas, Alan C. Berkema, Eric G. Tausheck, Brian D. Mahaffy, pg 97-108. Extended Industry Standard Architecture.

Update on the SCSI Standard, pg 103-104. See Also: Correction: Two missing lines from page 103, on page 19 in the February 1993 issue

Adapting the NCR 53C710 to Minimize Interrupt Impact on Performance, pg 105

An Architecture for Migrating to an Open Systems Solution. A process and a model have been developed that provide an easy growth path to a client/server, open systems architecture for information technology applications, by Michael E. Thompson, Gregson P. Siu, Jonathan van den Berg, pg 109-114. WSS, Worldwide Support Systems.

Authors December 1992: Robert [Bob] A. Boeller, Samuel [Sam] A. Stodder, John F. Meyer, Victor T. Escobedo, Alfred Holt Mebane IV, James [Jim] R. Schmedake, Iue-Shuenn Chen, Anne Park Kadonaga, Robert [Bob] D. Haselby, Timothy [Tim] A. Longust, David [Dave] M. Petersen, Chuong Ta, Robert W. Beauchamp, Joseph Giralt Adroher, Joan Uroz, Isidre Rosello, Ventura Caamano Agrafojo, David Perez, Josep Abella, Jordi Gonzalez, Jaume Ayats Ardite, Carles Castellsague Pique, Kyle A. Polychronis, Douglas [Doug] V. Larson, Farid Matta, Vicente [Vince] V. Cavanna, Christopher [Chris] S. Liu, David S. Clark, Andrea C. Lantz, Thomas [Tom] E. Parker, Joseph [Joe] H. Steinmetz, Bill Thomas, Alan C. Berkema, Eric G. Tausheck, Brian D. Mahaffy, Michael [Mike] E. Thompson, Gregson P. Siu, Jonathan [Jon] van den Berg, pg 115-119

Index: Volume 43 January 1992 through December 1992. PART 1: Chronological Index, pg 120-122. PART 2: Subject Index, pg 122-126. PART 3: Product Index, pg 127. PART 4: Author Index, pg 127-128.

February 1991 v.42 n.1

Cover: Superimposed on a photograph of the optical modulator are a simulated light beam (blue) and microwave energy (yellow) interacting in the modulator (green region) to produce a modulated light beam, represented by a wavy blue line.

High-Speed Lightwave Component Analysis to 20 GHz. A new family of instruments – analyzer, test set, sources, receivers, and modulator – characterizes electrical, electrooptical, and optical components of fiber optic communications systems at modulation rates to 20 GHz, by Daniel R. Harkins, Paul R. Hernday, Roger W. Wong, pg 6-13. 8703A, 83420A, 83421A, 83422A, 83423A, 83424A, 83425A.

Design of a 20-GHz Lightwave Component Analyzer. The HP 8703A is a fully integrated and calibrated instrument for lightwave component characterization. It offers a choice of wavelengths and laser types, both internal and external, by Paul R. Hernday, Geraldine A. Conrad, Michael G. Hart, Rollin F. Rawson, pg 13-22. 8703A.

Measurement Capabilities of the HP 8703A Lightwave Component Analyzer and the HP 71400C Lightwave Signal Analyzer, by Jack Dupre, Roger Wong, pg 17-18

20-GHz Lightwave Test Set and Accessories. With this lightwave test set and a compatible HP microwave network analyzer, users have the same key 20-GHz lightwave component analysis capabilities as with the integrated HP 8703A analyzer. The microwave network analyzer can still be used for its normal functions, by Joel P. Dunsmore, John V. Vallelunga, pg 23-33. 83420A.

Accuracy Considerations and Error Correction Techniques for 20-GHz Lightwave Component Analysis. An understanding of factory calibration techniques, system capabilities, and device-under-test sensitivities can result in more accurate and repeatable measurements using the HP 8703A lightwave component analyzer, by Daniel R. Harkins, Michael A. Heinzelman, pg 34-40

Development of an Optical Modulator for a High-Speed Lightwave Component Analyzer. The design and characterization of the first integrated optic modulator for commercial instrument application are described, including the advantages of titanium-in-diffused lithium niobate, device geometries for both phase modulators and Mach-Zehnder intensity modulators, stability considerations including bias drift and acoustic resonances, wavelength sensitivity, packaging and pigtailing, reliability and testing, by David J. McQuate, Roger L. Jungerman, pg 41-45. 8703A.

A High-Performance Optical Isolator for Lightwave Systems. This compact, rugged, two-stage design uses birefringent rutile crystals and Bi-YIG films to achieve high isolation, low insertion loss, high return loss, and polarization independence, by Harry Chou, Kok-Wai Chang, Siegmar Schmidt, Wayne V. Sorin, Jimmie L. Yarnell, Steven A. Newton, pg 45-50

A Broadband, General-Purpose Instrumentation Lightwave Converter. Converting lightwave signals with wavelengths of 1200 to 1600 nanometers to electrical signals, this device serves as an optical front end for spectrum analyzers, network analyzers, bit error rate testers, and oscilloscopes, by Christopher M. Miller, Roberto A. Collins, pg 51-57. 11982A.

A Lightwave Multimeter for Basic Fiber Optic Measurements. This new instrument can replace separate optical power meters, dedicated loss test sets, and stable light sources for measurements of absolute power, relative power, and loss, by Bernd Maisenbacher, Wolfgang Reichert, pg 58-63. 8153A.

Design of a Series of High-Performance Lightwave Power Sensor Modules. The power sensor modules for the HP 8153A lightwave multimeter feature a new optical interface, new detectors, an analog-to-digital converter based on a voltage-to-frequency converter, and a custom gate array. They offer excellent absolute accuracy and fast autoranging, by Jochen Rivoir, Emmerich Muller, Horst Schweikardt, pg 63-69

Calibration of Fiber Optic Power Meters. This paper describes the proposed IEC standard and HP’s implementation, by Christian Hentschel, pg 70-72

Semiconductor Laser Sources with Superior Stability for Optical Loss Measurements. Temperature stabilization and output power control provide excellent stability in the plug-in laser source modules for the HP 8153A lightwave multimeter, by Frank A. Maier, pg 73-76

Lightwave Multimeter Firmware Design. Flexibility and modularity were challenges in the firmware development of the HP 8153A lightwave multimeter. Built-in applications software automates many commonly needed measurements, by Wilfried Pless, Michael Pott, Robert Jahn, pg 77-83

Authors February 1991: Roger W. Wong, Paul R. Hernday, Michael [Mike] G. Hart, Rollin [Fred] F. Rawson, Geraldine [Gerry] A. Conrad, Joel P. Dunsmore, John V. Vallelunga, Daniel [Dan] R. Harkins, Michael [Mike] A. Heinzelman, David [Dave] J. McQuate, Roger L. Jungerman, Kok-Wai Chang, Siegmar Schmidt, Wayne V. Sorin, Jimmie L. Yarnell, Harry Chou, Steven [Steve] A. Newton, Christopher [Chris] M. Miller, Roberto A. Collins, Bernd Maisenbacher, Wolfgang Reichert, Jochen Rivoir, Horst Schweikardt, Emmerich Muller, Christian Hentschel, Frank A. Maier, Wilfried Pless, Michael  Pott, Robert Jahn, Mark W. Champine, pg 84-87

A Visual User Interface for the HP-UX and Domain Operating Systems. This graphical user interface provides a friendly and pleasant front end for the HP-UX and Domain operating systems. It makes these subsystems less intimidating for new users and at the same time provides features that appeal to experienced users, by Mark A. Champine, pg 88-99

Open Dialogue, pg 93

HP Visual User Interface, Version 2.0, by David A. Williams, pg 97-98

April 1991 v.42 n.2

Cover: In the background is a photomicrograph of a microwave monolithic integrated circuit. In the foreground are examples of thick-film and thin-film microwave hybrid microcircuits, waveguide components, and various amplifier, multiplier and modulator microcircuit assemblies

A Family of High-Performance Synthesized Sweepers. Eleven models offer frequency coverage to 50 GHz in coax, extendable to 100 GHz in waveguide with millimeter heads. Swept frequency accuracy is ten times better than previous designs. A menu-based user interface simplifies operation, by James E. Bossaller, Roger P. Oblad, John R. Regazzi, pg 6-16. 8360.

Designing for Low Cost of Ownership, by James R. Stead, pg 10-11

Strife Testing the Alphanumeric Display, by James R. Stead, pg 13

Front Panel Designed for Manufacturability, by James E. Bossaller, pg 15

Built-in Synthesized Sweeper Self-Test and Adjustments. A combination of hardware features and firmware routines makes it possible to isolate most failures to the assembly level and make many adjustments without external test equipment, by Michael J. Seibel, pg 17-23. 8360.

Automatic Frequency Span Calibration, pg 19

Accessing a Power Meter for Calibration, pg 22

A High-Performance Sweeper Output Power Leveling System. A feedforward ALC design gives HP 8360 sweepers improved flatness, power accuracy, and modulation performance. Factory calibration techniques minimize measurement errors so as not to degrade the improved specifications, by Glen M. Baker, Mark N. Davidson, Lance E. Haag, pg 24-30

Mismatch Error Calculation for Relative Power Measurements with Changing Source Match, pg 28-29

A 0.01-to-40-GHz Switched Frequency Doubler. This microcircuit doubler has a passthrough mode for 0.01 to-20-GHz input signals and a doubler mode for 20 to 40 GHz. An integrated RF switch changes modes. Slotline filters reduce spurious outputs to -40dBc or less, by James R. Zellers, pg 31-33. 8630.

A High-Speed Microwave Pulse Modulator. This optional fast pulse modulator uses an unequally spaced diode topology to achieve a wide bandwidth and a high on-off ratio without resorting to performance-limiting diode saturation, by Mary K. Koenig, pg 34-36. 8360.

New Technology in Synthesized Sweeper Microcircuits. A new packaging technology using thick-film hybrids and contacts integral to the package simplifies testing and rework and reduces RFI. New circuit designs include a triple balanced mixer and quasi-elliptic low-pass filters. New approaches reduce video feedthrough and harmonic generation, by Ronald C. Blanc, Richard S. Bischof, Patrick B. Harper, pg 36-46. 8360.

Modular Microwave Breadboard System, by Stan Bischof, pg 41

Quasi-Elliptic Low-Pass Filters, by Stan Bischof, pg 44-45

DC-to-50-GHz Programmable Step Attenuators. Based on HP’s proven edgeline technology, these attenuators provide the HP 8360 sweepers with up to 90 dB of attenuation in 10-dB steps, by David R. Veteran, pg 47-49. 8360, 33324/26/27.

50-to-110-GHz High-Performance Millimeter-Wave Source Modules. State-of-the-art microcircuit technologies and development tools were employed to produce a W-band amplifier tripler, a V-band amplifier doubler, an R-band amplifier doubler, and a coupler detector for two new frequency multiplier modules, by Giovonnae F. Anderson, Mohamed M. Sayed, pg 50-64. 83557A, 83558A.

The Use of the HP Microwave Design System in the W-Band Tripler Design, by Giovonnae Anderson, pg 53-54

The Use of HP ME 10/30 in the W-Band Tripler Design, by Roy Marciulionis, pg 57

Flatness Correction, by Lon Dearden, pg 59

High-Power W-Band Source Module, by Mohamed Sayed, pg 61

An Instrument for Testing North American Digital Cellular Radios. The HP 11846A is designed to produce filtered p/4 DQPSK modulated I and Q baseband signals needed to test digital cellular radios, by David M. Hoover, pg 65-72. 11846A.

HP 11846A Filtering Technique, pg 71-72

Measuring the Modulation Accuracy of p/4 DQPSK Signals for Digital Cellular Transmitters. Using digital signal processing techniques, this software accurately verifies the RF performance of digital cellular transmitters conforming to the North American Dual-Mode Cellular System standard, by Raymond A. Birgenheier, pg 73-82 . 11847A.

A Test Verification Tool for C and C++ Programs. The HP Branch Validator provides an automated tool that enables software developers to test and verify the branch coverage of their modules as they are created, by David L. Neuder, pg 83-92

Authors April 1991: Roger P. Oblad, James [Jim] E. Bossaller, John R. Regazzi, Michael [Mike] J. Seibel, Lance E. Haag, Mark N. Davidson, Glen M. Baker, James [Jim] R. Zellers, Mary K. Koenig, Ronald [Ron] C. Blanc, Richard [Stan] S. Bischof, Patrick [Pat] B. Harper, David [Dave] R. Veteran, Mohamed M. Sayed, Giovonnae F. Anderson, David [Dave] M. Hoover, Raymond [Ray] A. Birgenheier, David [Dave] L. Neuder, pg 93-95

June 1991 v.42 n.3

Cover: Two HP 48SX scientific expandable calculators can use their infrared input/output link to exchange data and programs along with a serial RS-232 cable link to a personal computer.

HP 48SX Scientific Expandable Calculator: Innovation and Evolution. Many of the features of this advanced handheld calculator have evolved from its predecessors, the HP 41C and HP 28S. Others, such as its unit management system, are new, by William C. Wickes, Charles M. Patton, pg 6-12

The HP 48SX Interfaces and Applications. The HP 48SX scientific expandable calculator provides support for multiple applications, both built-in and externally developed, with customized user interfaces. The Equation-Writer and interactive plotting are two of the built-in applications, by Diana K. Byrne, Robert W. Jones, Patrick J. Megowan, Gabe L. Eisenstein, Ted W. Beers, pg 13-21

HP Solve Equation Library Application Card. The card contains a library of 315 equations, the periodic table of the elements, a constants library, a multiple equation solver, a finance application, and engineering utilities, by Eric L. Vogel, pg 22-25. 48SX.

Hardware Design of the HP 48SX Scientific Expandable Calculator. Leveraging an earlier design resulted in prototypes with 90% production tooled parts only nine months after the start of the project. The HP 48SX includes an 8-line-by-22 character super-twisted nematic liquid crystal display, two expansion ports for ROM or battery-backed RAM cards, and two I/O ports: RS-232 and infrared, by M. Jack Muranami, James P. Dickie, Preston D. Brown, Mark A. Smith, Lester S. Moore, Thomas B. Lindberg, David L. Smith, pg 25-34

Industrial Design of the HP 48SX Calculator, by Michael Derocher, pg 27-28

HP 48SX Custom Integrated Circuit, by Preston D. Brown, pg 30

Mechanical Design of the HP 48SX Memory Card and Memory Card Connector, by M. Jack Muranami, pg 32-33

The HP 48SX Calculator Input/Output System. An RS-232 link allows communication with personal computers. An infrared link provides for printing and for two-way calculator-to-calculator communication, by Steven L. Harper, Robert S. Worsley, pg 35-40

Manufacturing the HP 48SX Calculator. Sharing manufacturing processes with earlier, simpler calculators shortened development time and improves manufacturing efficiency. The HP 48SX and the simpler calculators also share the same production line at the same time – a concept known as coproduction, by Richard W. Riper, pg 40-43

A 10-Hz-to-150-MHz Spectrum Analyzer with a Digital IF Section. The HP 3588A’s digital resolution bandwidth filters offer better shape factors and can be swept four times faster than their analog counterparts. Narrowband zoom measurements using fast Fourier transform analysis can be hundreds of times faster. Extensive self-calibration, a help system with hypertext, and adaptive data acquisition also improve performance, by James H. Cauthorn, Kirsten C. Carlson, Roy L. Mason, Eric J. Wicklund, Jay M. Wardle, Timothy L. Hillstrom, Joseph F. Tarantino, pg 44-60

Spectrum Analyzer Self-Calibration, by Timothy L. Hillstrom, Joseph F. Tarantino, pg 47-48

Adaptive Data Acquisition, by James H. Cauthorn, pg 51

Help System with Hypertext, by Mark M. Smith, pg 53-54

User Interface Compiler, Bryan P. Murray, pg 57-58

Authors June 1991: William [Bill] C. Wickes, Charles M. Patton, Ted W. Beers, Diana K. Byrne, Robert [Max] W. Jones, Gabe L. Eisenstein, Patrick [Pat] J. Megowan, Eric L. Vogel, Mark A. Smith, Lester [Les] S. Moore, James [Jim] P. Dickle, Preston D. Brown, David [Dave] L. Smith, Thomas [Tom] B. Lindberg, M. Jack Muranami, Steven [Steve] L. Harper, Robert [Bob] S. Worsley, Richard [Rick] W. Riper, Eric J. Wicklund, Joseph [Joe] F. Tarantino, James [Jim] H. Cauthorn, Kirsten C. Carlson, Jay M. Wardle, Timothy [Tim] L. Hillstrom, Roy L. Mason, Rex Backman, Douglas [Doug] Daetz, William [Bill] P. Carmichael, Edith Wilson, Spencer B. Graves, David Lubkin, John W. Goodnow, Ronald [Ron] F. Richardson, pg 60-64

Easy-to-Use Performance Tools with a Consistent User Interface Across HP Operating Systems. By involving customers in the product development process and incorporating their feedback into the product, HP GlancePlus has eliminated the mystique commonly associated with performance tools. Exception-based reporting displays only the interesting data, by Rex A. Backman, pg 65-70

Design Prototyping for HP GlancePlus, by Joe Thomas, pg 69

The Performance Tool Quadrant, by Rex Backman, pg 70

Improving the Product Development Process. To define, design, and product products and services that will be successful in the marketplace, it’s necessary to understand the product development process and employ tools to measure and improve the process, by Douglas Daetz, William P. Carmichael, Edith Wilson, Spencer B. Graves, pg 71-76

DSEE: A Software Configuration Management Tool. HP Apollo provides a software tool that helps to manage development and maintenance of the many components that make up large-scale software systems, by David C. Lubkin, pg 77-83. Domain Software Engineering Environment.

A Mechanism to Support Parallel Development via RCS. HP’s Imaging Systems Division uses the HP-UX revision control system utility, RCS, to implement a configuration management system that allows stable, released software to remain unchanged while modifications are made to some of its components, by John W. Goodnow, pg 84-89

Building and Managing an Integrated Project Support Environment. HP’s Roseville Networks Division has developed an integrated, cost-effective computing environment that fosters cooperative computing and provides R&D engineers with easy access to the tools and methodologies for product development, by Ronald F. Richardson, pg 90-96. HP-UX.

October 1991 v.42 n.4

Cover: HP’s Component Monitoring System

Introduction to the HP Component Monitoring System. This fourth-generation patient monitoring system offers a set of hardware and software building blocks from which functional modules are assembled to tailor the system to the application and the patient, by Christoph Westerteicher, pg 6-10

Medical Expectations of Today’s Patient Monitors, by Frank Rochlitzer, pg 9

Component Monitoring System Hardware Architecture. Up to 23 function cards residing in a computer module communicate over a message passing bus. The computer module, the display, and the parameter modules that measure vital signs can be in separate locations as needed by the application, by Christoph Westerteicher, Werner E. Heim, pg 10-13

Component Monitoring System Software Architecture. A modular design leads to a complex but easily manageable system that ensures economical resource utilization, by Martin Reiche, pg 13-18

Component Monitoring System Software Development Environment, pg 15

Component Monitoring System Parameter Module Interface. This interface is the link between the component Monitoring System computer module and the patient parameter modules. It provides fast response, optimum use of the available bandwidth, configuration detection, and parameter module synchronization, by Winfried Kaiser, pg 19-21

Measuring the ECG Signal with a Mixed Analog-Digital Application-Specific IC. Putting the ECG data acquisition subsystem into a Component Monitoring System parameter module mandates high-density packaging and low power consumption, and was only possible by implementing major elements of the circuit in a large mixed analog-digital ASIC, by Wolfgang Grossbach, pg 21-24

A Very Small Noninvasive Blood Pressure Measurement Device. This small assembly covers the entire blood pressure measurement spectrum from neonates to adults. The packaging of the air pump assembly makes several contributions to the objectives, by Rainer Rometsch, pg 25-26

A Patient Monitor Two-Channel Stripchart Recorder. Small enough to fit in a double-width HP Component Monitoring System parameter module, this recorder embodies simplicity of design, a highly tooled mechanism, and sophisticated printhead power management, by Leslie Bank, pg 26-28

Patient Monitor Human Interface Design. A design based on human factors leads to an intuitive and easy-to-use human interface for the HP Component Monitoring System, by Gerhard Tivig, Wilhelm Meier, pg 29-36

Globalization Tools and Processes in the HP Component Monitoring System. Software design and localization are decoupled. All languages are treated in the same way. A database contains the text strings for all languages, and automated tools aid the translator, by Gerhard Tivig, pg 37-40

The Physiological Calculation Application in the HP Component Monitoring System. This application converts raw real-time data into derived values the clinician can use to assess the patient’s hemodynamic, oxgenation, and ventilatory condition, by Paul Johnson, Steven J. Weisner, pg 40-43

Mechanical Implementation of the HP Component Monitoring System. The part count and the number of different parts are dramatically lower than for previous designs. Fewer than ten vendors are used for purchased mechanical parts, by Erwin Flachslander, Karl Daumuller, pg 44-48

An Automated Test Environment for a Medical Patient Monitoring System. The AUTOTEST program controls a keypusher and patient simulators to automate the testing of the software for the HP Component Monitoring System, by Dieter Goring, pg 49-52

Production and Final Test of the HP Component Monitoring System. A vertically oriented material flow minimizes handling and simplifies customization. Automated final test systems minimize human errors and collect data for monitoring process quality, by Otto Schuster, Joachim Weller, pg 52-54

Calculating the Real Cost of Software Defects. Using data from a well-established software metrics database and an industry profit loss model, a method is developed that computes the real cost of dealing with software defects, by William T. Ward, pg 55-58

A Case Study of Code Inspections. The code inspection process is a tool that can be used early in the software development cycle to help improve the quality of software products and the productivity of development engineers, by Mark E. Boles, Frank W. Blakely, pg 58-63

Authors October 1991: Christoph [Chris] Westerteicher, Werner E. Heim, Martin Reiche, Winfried Kaiser, Wolfgang Grossbach, Rainer Rometsch, Leslie [Les] Bank, Gerhard Tivig, Wilhelm Meier, Steven [Steve] J. Weisner, Paul Johnson, Karl Daumuller, Erwin Flachslander, Dieter Goring, Otto Schuster, Joachim Weller, William [Jack] T. Ward, Frank W. Blakely, Mark E. Boles, Larry Shintaku, Michael [Mike] B. Raynham, Douglas [Doug] M. Thom, Marilyn J. Lang, Gary W. Lum, Thomas Tom, Irvin R. Jones, Jr., Christophe Grosthor, Viswanathan [Suri] S. Narayanan, Philip [Phil] Garcia, John D. Graf, David [Dave] W. Blevins, Christopher [Chris] A. Bartholomew, pg 64-68

The HP Vectra 486 Personal Computer. The HP Vectra 486 series of computers uses the Intel486Ô microprocessor, a custom-designed burst-mode memory controller, and the HP implementation of the Extended Industry Standard Architecture (EISA), by Larry Shintaku, pg 69-73

The HP Vectra 486 EISA SCSI Subsystem, by Mike Jerbic, pg 70

The HP Vectra 486/33T, by Mark Linsley, pg 72

The EISA Connector. Providing backward compatibility in the EISA connector hardware for ISA I/0 boards resulted in a bilevel connector design that provides pins for both bus standards in the same connector, by Douglas M. Thom, Michael B. Raynham, pg 73-77

EISA Configuration Software, by Tony Dowden, pg 75

The HP Vectra 486 Memory Controller. The memory subsystem architecture and the memory controller in the HP Vectra 486 personal computer provide a high-performance burst-mode capability, by Gary W. Lum, Marilyn J. Lang, pg 78-83

The HP Vectra 486 BASIC I/O System. An Intel486 processor, the EISA bus standard, and a new memory subsystem all required enhancements to the Basic I/0 System to ensure that the HP Vectra 486 made the best possible use of these new features, by Irvin R. Jones, Jr., Philip Garcia, Viswanathan S. Narayanan, Thomas Tom, Christophe Grosthor, pg 83-92

Performance Analysis of Personal Computer Workstations. The ability to analyze the performance of personal computers via noninvasive monitoring and simulation allows designers to make critical design trade offs before committing to hardware, by David W. Blevins, John D. Graf, Christopher A. Bartholomew, pg 92-96

December 1991 v.42 n.5

Cover: an artist’s rendition of a typical HP Sockets domain

HP Software Integration Sockets: A Tool for Linking Islands of Automation. The task of integrating diverse applications over a network of HP and non-HP machines is made easier with this software tool, by Mark Ikemoto, Mitchell J. Amino, Irene S. Smith, Alan C. Miranda, Scott A. Gulland, Cynthia Givens, Kathleen A. Fulton, pg 6-23

Configuration Files, pg 13-14

Performance in the HP Sockets Domain, pg 16

HP sockets Gateway, pg 20

Rigorous Software Engineering: A Method for Preventing Software Defects. Formal specification languages enable software engineers to apply the rigorous concepts of discrete mathematics to the software development process, by Stephen P. Bear, Tony W. Rush, pg 24-31. HP-SL.

Specifying an Electronic Mail System with HP-SL. Starting with a list of system features and capabilities, an HP-SL specification for a simple mail system is developed and the steps involved in this process are analyzed, by Patrick G. Goldsack, Tony W. Rush, pg 32-39. Specification Language.

Specification of State in HP-SL, pg 38

Specifying Real-Time Behavior in HP-SL. Using the event and history specification features of HP-SL, the software for a real-time alarm monitor is specified, by Paul D. Harry, Tony W. Rush, pg 40-45. Specification Language.

History Specifications, pg 43

Using Formal Specification for Product Development. In one product development project, the use of precise software specifications helped to uncover potential problems that might ordinarily be overlooked, and raised some interesting issues about using formal techniques, by Curtis W. Freeman, B. Robert Ladeau, pg 46-50. HP-SL, Specification Language.

Formal Specification and Structured Design in Software Development. HP-SL history specifications and techniques from structured analysis are used to create a formal specification for a critical portion of the code for a medical instrument, by J. Daren Bledsoe, Paul D. Harry, Judith L. Cyrus, pg 51-58

Telecommunications Network Monitoring System. This system supervises any telephone network using the 2-Mbit/s CEPT primary rate interface and the CCITT R2 or #7 signaling system. It automatically collects and analyzes data on CCITT-specified and other parameters related to the calls flowing through the network nodes, by Nicola De Bello, Marco Silvestri, Giuseppe Mazzucato, Antonio Posenato, pg 59-65. E3500A.

Authors December 1991: Mitchell J. Amino, Irene [Skup] S. Smith, Mark Ikemoto, Alan C. Miranda, Kathleen [Kathy] A. Fulton, Cynthia Givens, Scott A. Gulland, Tony W. Rush, Stephen P. Bear, Patrick C. Goldsack, Paul D. Harry, B. Robert Ladeau, Curtis W. Freeman, Judith L. Cyrus, J. Daren Bledsoe, Marco Silvestri, Antonio Posenato, Giuseppe [Beppo] Mazzucato, Nicola [Nick] De Bello, pg 66-68

Index: Volume 42 January 1991 through December 1991. PART 1: Chronological Index, pg 69-70. PART 2: Subject Index, pg 71-73. PART 3: Product Index, pg 74. PART 4: Author Index, pg 75.

February 1990 v.41 n.1

Cover: The seven layers of the International Organization for Standardization’s OSI Reference Model on the HP OSI Express card, and the communication path between two end systems over a network

An Overview of the HP OSI Express Card. The OSI Express card provides on an I/O card the networking services defined by the ISO OSI (Open Systems Interconnections) Reference Model, resulting in off-loading much of the network overhead from the host computer. This and other features set the OSI Express card apart from other network implementations in existence today, by William R. Johnson, pg 6-8

The HP OSI Express Card Backplane Handler. The backplane on the HP OSI Express card is handled by a pair of VLSI chips and a set of firmware routines. These components provide the interface between the HP OSI Express card driver on the host machine and the common OSI networking environment, or CONE, on the OSI Express card, by Glenn F. Talbott, pg 8-18

Custom VSLI chips for DMA, pg 15-16

CONE: A Software Environment for Network Protocols. The common OSI network environment, or CONE, provides a network-specific operating system for the HP OSI Express card and an environment for implementing OSI protocols, by H. Michael Wenzel, Steven M. Dean, David A. Kumpf, pg 18-28

The Upper Layers of the HP OSI Express Card Stack. The upper three layers of the HP OSI Express card share the same architecture and use tables to simplify their implementations of the OSI stack. The applications and presentation layers are implemented in the same module, by Michael A. Ellis, Kimball K. Banker, pg 28-36

Implementation of the OSI Class 4 Transport Protocol in the HP OSI Express Card. The HP OSI Express card’s implementation of the transport layer protocol provides flow control, congestion control, and congestion avoidance, by Rex A. Pugh, pg 36-45

Data Link Layer Design and Testing for the OSI Express Card. The modules in the data link layer occupy the bottom of the OSI Reference Model. Therefore, it was imperative that they be finished first and that their reliability be assured before use by the upper layers of the OSI stack, by Judith A. Smith, Bill Thomas, pg 45-51

The OSI Connectionless Network Protocol, pg 49

HP OSI Express Design for Performance. Network standards are sometimes associated with slow networking. This is not the case with the HP OSI Express card. Because of early analysis of critical code paths, throughput exceeds 600,000 bytes per second, by Elizabeth P. Bortolotto, pg 51-58

The HP OSI Express Card Software Diagnostic Program. The software diagnostic program is a high-level mnemonic debugger. The structure definition utility isolates the diagnostic program from compiler differences and data definition changes, by Joseph R. Longo, Jr., pg 59-67

Support Features of the HP OSI Express Card. The HP OSI Express card offers event logging and tracing to facilitate troubleshooting in multivendor networks, by Charles L. Hamer, Jayesh K. Shah, pg 67-72

Integration and Test for the OSI Express Card’s Protocol Stack. Special test tools and a multidimensional integration process enabled engineers to develop, test, and debug the firmware for the OSI Express card in two different environments. In one environment an emulation of the OSI Express card was used and in another the real hardware was used, by Neil M. Alexander, Randy J. Westra, pg 72-77

Authors February 1990: William [Bill] R. Johnson, Glenn F. Talbott, David [Dave] A. Kumpf, Steven [Steve] M. Dean, H. Michael [Mike] Wenzel, Kimball [Kim] K. Banker, Michael [Mike] A. Ellis, Rex A. Pugh, Judith [Judy] A. Smith, Bill Thomas, Elizabeth [Liz] P. Bortolotto, Joseph [Rick] R. Longo, Jr., Jayesh [Jay] K. Shah, Charles [Chuck] L. Hamer, Neil M. Alexander, Randy J. Westra, Christopher [Chris] M. Miller, Douglas [Doug] M. Baney, Wayne V. Sorin, pg 77-79

High-Speed Lightwave Signal Analysis. This analyzer measures the important characteristics of high-capacity lightwave systems and their components, including single-frequency or distributed feedback semiconductor lasers and broadband pin photodectors, by Christopher M. Miller, pg 80-91. 71400A.

A Broadband Instrumentation Photoreceiver, by Dennis Derickson, pg 84-85

Linewidth and Power Spectral Measurements of Single-Frequency Lasers. A special fiber optic interferometer preprocesses optical signals for a lightwave signal analyzer to measure laser characteristics using delayed and gated delayed self-homodyne techniques, by Douglas M. Baney, Wayne V. Sorin, pg 92-96

April 1990 v.41 n.2

Cover: Behind the front door of the HP 1050 Series liquid chromatograph quaternary pump module is the four-way proportioning valve and the dual-piston pump

A New Modular High-Performance Liquid Chromatograph. The HP 1050 Series of modules refines and extends HP’s LC technology, emphasizing a common architecture and a standard design for all modules, by Herbert Wiederoder, pg 6-10. HPLC.

An Introduction to Liquid Chromatography, by Henry J. van Nieuwkerk, pg 7-8

Industrial Design and Ergonomics, by Raoul Dinter, pg 9-10

Quality Engineering for a Liquid Chromatography System. For the HP 1050 Series LC system, customer expectations were translated into measurable quality goals, which were then verified by special test methods, by Helge Schrenker, Wolfgang Wilde, pg 11-16

Design for Manufacturing, by Heiko Breckwoldt, Manfred Seltz, pg 14-15

A Compact, Programmable Sample Injector and Autosampler for Liquid Chromatography. The HP 1050 Series autosampler is capable of manual or automatic injection from up to 119 sample vials at injection volumes up to 2000 microliters, by Wolfgang Kretz, Gerhard Ple, pg 17-23

Flexible, Precise Solvent Delivery for Liquid Chromatography. The HP 1050 Series LC pump merges reliable, known technology with powerful control capabilities that compensate for solvent properties and physical side effects. A custom IC implements the motor and pump control functions, by Klaus Witt, Fred Strohmeier, pg 24-35

Pump Control Chip, by Fred Strohmeier, Klaus Witt, pg 30-31

A New Generation of LC Absorbance Detectors. Two absorbance detectors are available for the HP 1050 Series modular LC system: a high-sensitivity programmable scanning detector and a high-speed, multiple wavelength diode array detector, by Gunter Hoschele, Volker Brombacher, Konrad Teitz, Hubert Kuderer, Axel Wiese, pg 36-43

Firmware Development for a Modular Liquid Chromatography System. More than half of the firmware for the HP 1050 Series High-Performance Liquid Chromatography System is common to all modules. It is customized for individual modules by means of module-specific tables, by Christian Buttner, Fromut Fritze, Gerhard Ple, pg 44-50

HP OpenView Network Management. HP OpenView is HP’s first set of integrated hardware and software products designed to address the needs of managing open, standards-based, multivendor networks in a consistent, user-friendly manner, by Anthony S. Ridolfo, pg 51-53

HP OpenView Network Management Architecture. This article highlights the principal objectives of the architecture and the reference models used to support the HP OpenView product development, by Mark L. Hoerth, Keith S. Klemba, Hui-lin Lim, Maureen C. Mellon, pg 54-59

HP OpenView Windows: A User Interface for Network Management Solutions. HP OpenView Windows provides a consistent graphics-based user interface for users of network management applications, and a set of utilities that enable developers to create network management applications for the HP OpenView Windows environment, by Arthur J. Kulakow, Kathleen L. Gannon, Catherine J. Smith, pg 60-65

HP OpenView Bridge Manager: Network Management for HP Lan Bridges. Since LAN bridges receive all the data packets transmitted on the LAN segments they interconnect, they are an ideal focal point for monitoring packet integrity and the number of packets forwarded and filtered, by Andrew S. Fraley, Tamra I. Perez, pg 66-70

HP OpenView Data Line Monitor. Monitoring large and complex network configurations is crucial to maintaining the integrity and performance of data communication lines. The HP OpenView Data Line Monitor is a hardware and software solution for monitoring these data communication lines, by Michael S. Hurst, pg 71-76

Network Management for the HP 3000 Datacom and Terminal Controller. The HP OpenView DTC Manager software is responsible for controlling, monitoring, and diagnosing the DTCs on a local area network. Its functions can be exercised either from a local workstation on the LAN or from an HP Response Center or other remote workstation, by Michele A. Prieur, Serge Y. Amar, pg 76-84

Developing a Distributed Network Management Application Using HP OpenView Windows. Using concepts from the HP OpenView architecture and the facilities provided by the HP Openview Windows, network management services and distributed applications were developed for user feedback and validation of the architecture, by Lisa M. Cole, Atul R. Garg, pg 85-91

Authors April 1990: Herbert Wiederoder, Helge Schrenker, Wolfgang Wilde, Gerhard Ple, Wolfgang Kretz, Klaus Witt, Fred Strohmeier, Axel Wiese, Konrad Teitz, Gunter Hoschele, Volker Brombacher, Hubert Kuderer, Christian Buttner, Fromut Fritze, Anthony [Tony] S. Ridolfo, Keith S. Klemba, Hui-Lin Lim, Maureen C. Mellon, Mark L. Hoerth, Arthur J. Kulakow, Kathleen L. Gannon, Catherine J. Smith, Tamra I. Perez, Andrew S. Fraley, Michael S. Hurst, Serge Y. Amar, Michele A. Prieur, Lisa M. Cole, Atul R. Garg, pg 92-95

June 1990 v.41 n.3

Cover: An HP SoftBench window environment, showing the OSF/Motif 3D Appearance

Making Computer Behavior Consistent: The HP OSF/Motif Graphical User Interface. Window-oriented user interfaces provide knowledge workers with powerful tools to control their computer environments and increase productivity. The OSF/Motif graphical user interface provides standards and tools to ensure consistency in the appearance and behavior of applications running in the X Window System, by Axel O. Deininger, Charles V. Fernandez, pg 6-12

OSF/Motif, pg 8

The HP OSF/Motif Window Manager. The HP OSF/Motif window manager, which is built on top of the X Window System, is a window management interface that provides a 3D enhanced Presentation Manager appearance and behavior using HP OSF/Motif widgets, by Keith M. Taylor, Brock C. Krizan, pg 12-26

Interclient Communication Conventions, pg 23-24

Programming with HP OSF/Motif Widgets. The HP OSF/Motif widget library makes it easy for a developer to create applications with a graphical user interface that has a consistent appearance and behavior, by Benjamin J. Ellsworth, Donald L. McMinds, pg 26-35

The Evolution of Widgets, pg 27-28

The HP Softbench Environment: An Architecture for a New Generation of Software Tools. The HP SoftBench product improves programmer productivity by integrating software development tools into a single unified environment, allowing the program developer to concentrate on tasks rather than tools, by Martin R. Cagan, pg 36-47

Architecture Support for Automated Testing, by Jack Walicki, pg 37-38

Broadcast Message Server Message Structure, pg 39

Distributed Execution, Data, and Display, by Gerald P. Duggan, pg 40

Schemes: Interface Consistency, by John R. Diamant, Colin Gerety, pg 41

Pervasive Editing in the HP SoftBench Environment, by William A. Kwinn, pg 42

Native Language Support, by Warren J. Greving, Kathryn Y. Kwinn, pg 43-44

Mechanisms for Efficient Delivery, by Sam Sands, pg 45

Application of a Reliability Model to the HP SoftBench Environment, by Tim Tillson, pg 46

A New Generation of Software Development Tools. The HP SoftBench environment’s development manager, program editor, program builder, static analyzer, program debugger, and mail collaborate to support task-oriented program construction, test, and maintenance, by Colin Gerety, pg 48-58

Development Manager, by Anthony P. Walker, pg 49

Program Editor, by Colin Gerety, pg 51

Program Builder, by James W. Wichelman, pg 52-53

Static Analyzer, by Gary L. Thunquest, John P. Dutton, pg 54

Program Debugger, by Robert A. Morain, Robert B. Heckendorn, pg 55-56

Integrated Help, by John R. Diamant, pg 57

HP Encapsulator: Bridging the Generation Gap. By means of the Encapsulator description language, a user can integrate tools into the HP SoftBench environment without modifying their source code, and can tailor the HP SoftBench environment to support a particular software development process, by Brian D. Fromme, pg 59-68

HP Encapsulator CASE Case Study, by Bob Desinger, pg 65

Introduction to Particle Beam LC/MS. Particle beam liquid chromatography/mass spectrometry (LC/MS) yields classical, library-searchable electron impact spectra for compounds that are too thermally labile or nonvolatile to be analyzed by gas chromatography/mass spectrometry (GC/MS), by Robert G. Nordman, James A. Apffel, Jr., pg 69-76

Advances in IC Testing: The Membrane Probe Card. Conventional integrated circuit wafer test probes have mechanical and electrical weaknesses, especially for testing high-frequency or high-speed devices and chips that have large numbers of input and outputs. Membrane probe technology overcomes most of these limitations, by Farid Matta, pg 77-85

Authors June 1990: Axel O. Deininger, Charles V. Fernandez, Keith M. Taylor, Brock C. Krizan, Benjamin J. Ellsworth, Donald [Don] L. McMinds, Martin R. Cagan, Colin Gerety, Brian D. Fromme, Robert [Bob] G. Nordman, James [Alex] A. Apffel, Jr., Farid Matta, pg 86-87

August 1990 v.41 n.4

Cover: An automated workcell with robots and controllers at the General Motors Corporation facility in Oshawa, Canada. Providing the communication links between the components in the workcell is a typical application of the Manufacturing Automation Protocol 3.0 (MAP 3.0)

HP Manufacturing Automation Protocol 3.0. The Manufacturing Automation Protocol (MAP) is an intervendor program that addresses the problems that have plagued factory automation in the past. HP’s MAP 3.0 product provides international standard network services and protocols and a multivendor MAP programmatic interface, by Bruce J. Talley, Collin Y. W. Park, pg 6-10

Overview of the OSI Reference Model, pg 8

Upper Layer Architecture for HP MAP 3.0 OSI Services. Based on the OSI standard for the application layer, the HP MAP 3.0 upper layer architecture provides a standardized structure that allows network application developers to focus on the services provided by their applications rather than the architecture necessary to interface to network protocols, by Sanjay B. Chikarmane, pg 11-15

Directory Services in the HP MAP 3.0 Environment. To provide a standardized implementation of a directory service for locating resources in the HP MAP 3.0 environment, the ISO X.500 directory standard is used, by Darrell O. Swope, Colleen S. Fettig, Beth E. Cooke, Roy M. Vandoorn, Paul B. Koski, pg 15-23

HP MAP 3.0 File Transfer, Access, and Management/800. File Transfer, Access, and Management, or FTAM, is an OSI standard that defines the framework upon which layer seven file transfer services can be built for accessing and managing files across open systems, by Steven W. Manweiler, pg 24-30

HP MAP 3.0 Manufacturing Message Specification/800. The first release of HP’s implementation of the MMS standard offers powerful communication tools for monitoring and controlling robots, PLCs and other factory-floor devices in the manufacturing environment, by Thomas G. Bartz, Peter A. Lagoni, Christopher Crall, pg 31-39

HP MMS/800 Services, pg 38

HP-UX Kernel Communications Modules for a Card-Based OSI Protocol Stack. HP MAP 3.0 products are based on the HP OSI Express card, which implements most of the OSI protocol stack on an I/O card. The kernel modules provide reliable data transfer between the host computer and the HP OSI Express card, by Kimberly K. Scott, Eric C. Scoredos, Richard H. Van Gaasbeck, pg 40-49

Interoperability Testing for HP MAP 3.0. Interoperability testing is used to ensure that HP MAP 3.0 OSI services can communicate with other vendors’ systems and to uncover errors both in HP’s and other vendors’ OSI implementations, by Jeffrey D. Meyer, pg 50-53

The HP MAP 3.0 Software Integration Lifecycle. The HP MAP 3.0 program was a large multidivisional effort with project teams spread over different geographical locations and working under different organizations. To manage the integration of the hardware and software components from these different project teams, a generic integration lifecycle was developed for the HP MAP 3.0 product, by Douglas R. Gregory, pg 54-60

The Integrated Personal Development Environment, pg 59

Authors August 1990: Bruce J. Talley, Collin Young Woon Park, Sanjay B. Chikarmane, Beth E. Cooke, Colleen S. Fettig, Darrell O. Swope, Paul B. Koski, Roy M. Vandoorn, Steven W. Manweiler, Peter A. Lagoni, Christopher Crall, Thomas G. Bartz, Kimberly K. Scott, Eric [Rio] C. Scoredos,  Richard Henry Van Gaasbeck, Jeffrey D. Meyer, Douglas R. Gregory, Gerd F. Koffmane, Werner Berkel, Frederick [Fred] L. Eatock, Heino Hopke, Patrick Schmid, Hans-Jurgen Snackers, Hans-Jurgen Wagner, Stefan G. Klein, Volker Eberle, Peter Schinzel, Gunter Steinbach, pg 60-63

500-MHz and 300-MHz Programmable Pulse Generators. These instruments are capable of testing the most advanced CMOS, ECL and GaAs devices. A custom bipolar IC generates the timing parameters, by Patrick Schmid, Gerd Koffmane, Frederick L. Eatock, Heino Hopke, Werner Berkel, Hans-Jurgen Snackers, pg 64-78. 8131A. 8130A.

Hybrid Assembly, by Hans-Jurgen Snackers, pg 76-77

A 500-MHz Pulse Generator Output Section. Surface mount, thick-film hybrid, and gallium arsenide technologies contribute to the advanced output capabilities of the HP 8131A pulse generator, by Hans-Jurgen Wagner, Stefan G. Klein, pg 79-84

A 300-MHz, Variable-Transition-Time Pulse Generator Output Section. The design includes separate fast and slow slope generators and custom GaAs and bipolar ICs, by Volker Eberle, Peter Schinzel, Gunter Steinbach, pg 85-92. 8130A.

October 1990 v.41 n.5

Cover: The flat plate is the iris plate from a magnetically tuned preselection filter used in the HP 11974 Series preselected mixers. In the middle are two tiny barium ferrite resonator spheres. Also shown are the top and bottom halves of the tuning magnet, the magnet body, and the two parts of the waveguide assembly

An Overview of the HP Interactive Visual Interface. The HP Interactive Visual Interface (HP IVI) product uses object-oriented and window technologies to provide interactive and programmatic tools for building graphical user interfaces, by Roger K. Lau, Mark E. Thompson, pg 6-10

HP IVI Project Management, by Chuck Robinson, Robin Ching, pg 7

Quality Function Deployment and HP IVI, by Mark Thompson, Kent Chao, pg 9-10

The HP IVI Object-Oriented Toolkit. Using object-oriented design techniques, a minimum set of functions is provided with the HP IVI product for manipulating widgets and graphic objects to create a graphical user interface, by David G. Wathen, Mydung Thi Tran, pg 11-20

HP IVI Application Program Interface Design. To provide the features available in HP IVI, the internal design and implementation of the application program interface leveraged concepts and software from graphics packages, window technology, widgets, Xt Intrinsics, and object-oriented design, by Gary D. Thomsen, Pamela W. Munsch, Warren I. Otsuka, pg 21-31

Object-Oriented Design in HP IVI, by Pam Munsch, Steven Witten, pg 29-30

HP IVIBuild: Interactive User Interface Builder for HP IVI. Using the facilities provided by HP IVI’s application program interface, HP IVIBuild allows developers to create and experiment with different types of application user interfaces, save them in files, and bind them to the functionality of the application at run time, by Steven P. Witten, Hai-Wen L. Bienz, pg 32-38

Creating an Effective User Interface for HP IVIBuild. The HP IVIBuild user interface was a collaborative effort between the software engineers developing the code for the product and a group of industrial designers who understand the requirements of an effective graphical user interface, by Steven R. Anderson, Jennifer Chaffee, pg 39-44

Authors October 1990: Roger K. Lau, Mark E. Thompson, Mydung Thi Tran, Dabid G. Wathen, Pamela [Pam] W. Munsch, Warren I. Otsuka, Gary D. Thomsen, Steven [Steve] P. Witten, Hai-Wen L. Bienz, Steven [Steve] R. Anderson, Jennifer Chaffee, Michael [Mike] J. Levernier, Robert [Bob] J. Matreci, Dean B. Nicholson, Kent L. Garliepp, Kathleen [Kathy] A. Fulton, Irene Skupniewicz, John U. Frohlich, Asad Aziz, Ravi Kaw, David [Dave] W. Quint, Frank J. Perezalonso, Chee K. Chow, Kent P. Misegades, Vivek Mansingh, pg 45-48

26.5-to-75-GHz Preselected Mixers Based on Magnetically Tunable Barium Ferrite Filters. A new resonator material – barium ferrite – and a new four-sphere design are featured in a series of magnetically tunable preselection filters for the millimeter-wave frequency range, by Michael J. Levernier, Robert J. Matreci, Dean B. Nicholson, pg 49-58 . 11974.

Hexagonal Ferrites for Millimeter-Wave Applications. Scandium-doped, M-phase barium ferrite has the necessary properties. Crystals are grown and spheres are processed and tested in-house, by Dean B. Nicholson, pg 59-61

HP DIS: A Development Tool for Factory-Floor Device Interfaces. The HP Device Interface System provides a development facility that includes a high-level Protocol Specification Language, a testing facility, and a run-time facility for device interfaces that run in an HP-UX environment on HP 9000 computers, by Kathleen A. Fulton, Kent L. Garliepp, Irene Skupniewicz, John U. Frolich, pg 62-72

Finite State Machine, pg 65

Matching Messages, pg 67

Action Routines, pg 69

Measurement of R, L, and C Parameters in VLSI Packages. Developed to verify the electrical models of a 408-lead multilayer ceramic package, this measurement technique can measure the very small inductances, capacitances, and resistances that are typical of high-performance packages. It does not require extraction of RLC parameters from time-domain reflectometer measurements, by Frank J. Perezalonzo, David W. Quint, Asad Aziz, Ravi Kaw, pg 73-77

Statistical Circuit Simulation of a Wideband Amplifier: A Case Study in Design for Manufacturability. Statistical variations of integrated circuit parameters are often correlated, not independent. Examples are side-by-side resistor values and matched transistor gains. Accounting for these correlations using principal component analysis can make statistical simulation an accurate predictor of manufacturing data, by Chee K. Chow, pg 78-81

System Level Air Flow Analysis for a Computer System Processing Unit. Numerical simulation of particle traces using finite element modeling and supercomputers gives a good qualitative picture of air flow features. Computer velocity profiles and pressure drops have reasonable good accuracy, by Vivek Mansingh, Kent P. Misegades, pg 82-87

December 1990 v.41 n.6

Cover: Magnetooptical disk cartridges are shown with various mechanical parts designed for the HP Series 6300 Model 20GB/A 20-gigabyte rewritable optical disk library system

A Rewritable Optical Disk Library System for Direct Access Secondary Storage. This autochanger system can store up to 20.8 Gbytes of data on-line. Applications include archival storage, automated backup and recovery, and document storage and retrieval, by Donald J. Stavely, Mark E. Wanger, Kraig A. Proehl, pg 6-13. Series 6300 Model 20GB/A.

Magnetooptical Recording Technology, by Ed Sponheimer, pg 8-9

Integrating the Optical Library Unit into the HP-UX Operating System, by Daryl C. Stolte, Bruce A. Thompson, David Ellis, pg 11-12

Mechanical Design of an Optical Disk Autochanger. The autochanger moves 32 disk cartridges between two magnetooptical drives and two stacks of storage positions using only two motors and three optical sensors, by Raymond C. Sherman, Daniel R. Dauner, Jennifer L. Methlie, Michael L. Christensen, Leslie G. Christie, Jr., pg 14-23. Series 6300 Model 20GB/A.

Optical Disk Autochanger Servomechanism Design. A “sense of touch” and error recovery routines contribute to reliability. Data capture, error injection, and mechanical regression testing facilities improved the productivity of the designers, by Mark J. Bianchi, Thomas C. Oliver, pg 24-34. Series 6300 Model 20GB/A.

Data Capture System, by Mark Bianchi, pg 29-30

Error Injection, by Rick Kato, pg 33

Qualification of an Optical Disk Drive for Autochanger Use. Ninety-three design changes were made to the stand-alone drive to quality it for use in an autochanger, by Colette T. Howe, Kevin S. Saldanha, pg 35-37. Series 6300 Model 20GB/A.

A CD-ROM Drive for HP 3000 and HP 9000 Computer Systems. The HP Series 6100 Model 600/A HP-IB CD-ROM drive provides facilities that allow HP 3000 and HP 9000 computer system users to access data stored on CD-ROM disks, which can store up to 553 Mbytes of audio and digital information, by Edward W. Sponheimer, John C. Santon, pg 38-41

Error Correction Implementation and Performance in a CD-ROM Drive. The HP Series 6100 Model 600/A implements the error protection algorithm defined by the CD-ROM yellow book standard. This extra level of protection means that the error rate is improved from one error in 10¹² bits to one in 10¹⁶, by John C. Meyer, pg 42-48

Error Detection and Correction Primer, pg 46-47

Providing Software Protection Capability for a CD-ROM Drive. The HP Series 6100 Model 600/A drive supports two levels of security for software protection: load-time security, which prevents loading a package without the proper authority, and scrambling data on the disk to prevent reading a protected disk with another CD-ROM , by Kenneth R. Nielsen, pg 49-53

Support for the ISO 9660/HSG CD-ROM File System Format in the HP-UX Operating System. To allow HP-UX users access to CD-ROM files, the ISO 9660/HSG file system format standard has been incorporated into the HP-UX 7.0 operating system, by William A. Gates, Bruce A. Thompson, Dale K. McCluskey, Ping-Hui Kao, pg 54-59

Authors December 1990: Donald [Don] J. Stavely, Kraig A. Proehl, Mark W. Wanger, Daniel [Dan] R. Dauner, Jennifer L. Methlie, Michael [Mike] L. Christensen, Raymond [Ray] C. Sherman, Leslie G. Christie, Jr., Mark Bianchi, Thomas C. Oliver, Kevin S. Saldanha, Colette T. Howe, Edward [Ed] W. Sponheimer, John C. Santon, John C. Meyer, Kenneth [Ken] R. Nielson, Ping-Hui Kao, William [Bill] A. Gates, Bruce A. Thompson, Dale K. McCluskey, Jean-Pierre Allegre, Marie-Therese [Marie-The] Sarrasin, Frederic Maioli, Nguyen P. Hung, Frank E. Hauser, pg 60-62

X.25 Packet Assembler/Disassembler Support in the HP 3000 Data Communications and Terminal Controller. The PAD support software implements the communications protocols specified in CCITT recommendations X.3 and X.29. For performance reasons, the software is in the datacom and terminal controller (DTC) rather than the host MPE XL System, by Jean-Pierre Allegre, Marie-Therese Sarrasin, pg 63-73. 2345A.

An Object-Oriented Message Interace for Testing the HP 3000 Data Communications and Terminal Controller. Creating a general-purpose message compiler/decompiler using symbolic expressions, expert systems concepts, object classes, and inheritance reduces software testing overhead and improves test readability and portability, by Frederic Maioli, pg 74-80. 2345A, DTC.

Index: Volume 41 January 1990 through December 1990. PART 1: Chronological Index, pg 81-82. PART 2: Subject Index, pg 83-86. PART 3: Product Index, pg 86. PART 4: Author Index, pg 87.

Effect of Fiber Texture on the Anisotropic Dimensional Change of Cu 1.8 Wt% Be. The dimensional changes in cold-drawn Cu 1.8wt% (11.4 at%) Be rods resulting from aging are investigated. The dimensional changes are nearly isotropic for as-quenched specimens but are anisotropic for cold-drawn specimens. The theoretical dimensional changes predicted based on the degree of preferred orientation, the crystallographic data of Cu-Be, and the geometry of the specimens agree with the experimental data, by Nguyen P. Hung, Frank E. Hauser, pg 88-91

February 1989 v.40 n.1

Cover: The circuit diagram of a zero-dead-time-counter, a key component of the HP 5371A Frequency and Time Interval Analyzer

Characterization of Time Varying Frequency Behavior Using Continuous Measurement Technology. The HP 5371A Frequency and Time Interval Analyzer implements the continuous measurement technique to provide advanced capabilities for measuring frequency and time interval variations, by Mark Wechsler, pg 6-12. See Also the Corrections section below.

Analyzing Microwave and Millimeter-Wave Signals, by Richard Schneider, pg 8

Firmware System Design for a Frequency and Time Interval Analyzer. Built-in control and analysis firmware tailors the continuous measurement technology of the HP 5371A to dynamic frequency and time interval applications, by Lisa B. Stambaugh, Terrance K. Nimori, pg 13-21

Table-Driven Help Screen Structure Provides On-Line Operating Manual. The structure and firmware were designed for ease of reuse, by Lisa B. Stambaugh, pg 21-24. 5371A.

Input Amplifier and Trigger Circuit for a 500-MHz Frequency and Time Interval Analyzer. Two thick-film hybrid circuits provide precise, stable high-frequency triggering in manual trigger, single autotrigger, and repetitive autotrigger modes, by Johann J. Heinzl, pg 24-27

Phase Digitizing: A New Method for Capturing and Analyzing Spread-Spectrum Signals. By continuously counting and time-tagging zero crossings, a phase or time encoded signal can be digitized and analyzed with efficiency and precision, by David C. Chu, pg 28-35

See Also: Corrections: Two corrections for the article “Phase Digitizing: A New Method for Capturing and Analyzing Spread-Spectrum Signals”; also a correction to figures on page 7 and page 9 in “Characterization of Time Varying Frequency Behavior Using Continuous Measurement Technology”, page 6 in the same issue, page 56 in the April 1989 issue

Reading a Counter on the Fly, pg 33

Frequency and Time Interval Analyzer Measurement Hardware. Examples of measurements on a frequency agile radio are used to illustrate the design and operation of the measurement hardware of the HP 5371A analyzer, by Paul S. Stephenson, pg 35-41

An Integrated Voice and Data Network Based on Virtual Circuits. Developed as an HP Laboratories research project, this network offers true integration of voice and data, a single architecture for local and wide area networks, high throughput, low host overhead, very good cost/performance ratio, and effective interfacing to existing standards, by Robert Coackley, Howard L. Steadman, pg 42-49. StarLAN 10.

Authors February 1989: Mark Weschler, Lisa B. Stambaugh, Terrance [Terry] K. Nimori, Johann J. Heinzl, David C. Chu, Paul S. Stephenson, Howard L. Steadman, Robert [Bob] Coackley, Fred H. Ives, Mark D. Talbot, Dale R. Beucler, James [Jim] O. Barnes, Craig A. Heikes, Thomas [Tom] M. Higgins, Jr., Kenneth [Ken] S. Thompson, David [Dave] J. Schwartz, Alan L. McCormick, pg 49-51

Multifunction Synthesizer for Building Complex Waveform. The HP 8904A uses digital synthesis and VLSI technology to provide a highly reliable tool for demanding applications like VOR, ILS, FM stereo, and communication signaling, by Fred H. Ives, pg 52-57. 8904A.

Mechanical Design of the HP 8904A, by Larry R. Wright, pg 55-56

Digital Waveform Synthesis IC Architecture. The digital waveform synthesis IC is the heart of the HP 8904A Multifunction Synthesizer. It provides a digital approach to the conventional analog functions of modulation and signal generation, by Mark D. Talbot, pg 57-62

Development of a Digital Waveform Synthesis Integrated Circuit. The digital waveform synthesis IC is an excellent example of using custom VLSI in an instrument to reduce cost and increase functionality, accuracy, and reliability, by Craig A. Heikes, James O. Barnes, Dale R. Beucler, pg 62-65. 8904A.

Analog Output System Design for a Multifunction Synthesizer. The analog output system for the HP 8904A takes the 12-bit data stream from the digital waveform synthesis IC and converts it to an analog signal with excellent frequency response and low distortion, by Thomas M. Higgins, Jr., pg 66-69

A Generating a Phase-Locked Binary Reference Frequency, pg 68

Firmware Design for a Multiple-Mode Instrument. The firmware architecture of the HP 8904A Multifunction Synthesizer is designed to handle the existing operating modes efficiently and to facilitate evolutionary changes, by Mark D. Talbot, pg 70-73

Multifunction Synthesizer Applications. Application areas for the HP 8904A Multifunction Synthesizer include telecommunications, navigation, mobile radio communications, consumer electronics, sonar, and electromechanical systems, by Kenneth S. Thompson, pg 73-76

Testing and Process Monitoring for a Multifunction Synthesizer. Ensuring the quality and reliability of the HP 8904A Multifunction Synthesizer required a twofold test strategy: understanding the critical characteristics of the instrument and process control, by David J. Schwartz, Alan L. McCormick, pg 77-80

Assuring Reliability, by Donald Borowski, pg 80

April 1989 v.40 n.2

Cover: A 3458A Digital Multimeter

An 8 1/2-Digit Digital Multimeter Capable of 100,000 Readings per Second and Two-Source Calibration. A highly linear and extremely flexible analog-to-digital converter and a state-of-the-art design give this DMM new performance and measurement capabilities for automated test, calibration laboratory, or R&D applications, by Scott D. Stever, pg 6-7. 3458A.

An 8 1/2-Digit Integrating Analog-to-Digital Converter with 16-Bit, 100,000-Sample-per-Second Performance. This integrating-type AC uses multislope runup, multislope rundown, and a two-input structure to achieve the required speed, resolution and linearity, by Wayne C. Goeke, pg 8-15. 3458A.

Precision AC Voltage Measurements Using Digital Sampling Techniques. Instead of traditional DMM techniques such as thermal conversion or analog computation, the HP 3458A DMM measures rms ac voltages by sampling the input signal and computing the rms value digitally in real time. Track-and-hold circuit performance is critical to the accuracy of the method, by Ronald L. Swerlein, pg 15-21

Calibration of an 8 1/2-Digit Multimeter from Only Two External Standards. Internal transfer standards and autocalibration simplify external calibration and extend the period between external calibrations to two years, by Scott D. Stever, Wayne C. Goeke, Ronald L. Swerlein, Stephen B. Venzke, pg 22-30. 3458A.

Josephson Junction Arrays, by John Giem, pg 24-25

A High-Stability Voltage Reference, by David E. Smith, pg 28

Design for High Throughput in a System Digital Multimeter. High-speed custom gate arrays, microprocessors, and supporting hardware and a substantial investment in firmware design contributed to the design of the HP 3458A DMM as a system for moving data efficiently, by Gary A. Ceely, David J. Rustici, pg 31-38

Firmware Development System, by Victoria K. Sweetser, pg 33-34

Custom UART Design, by David J. Rustici, pg 36

High-Resolution Digitizing Techniques with an Integrating Digital Multimeter. Capabilities and limitations of the HP 3458A Digital Multimeter as a high-resolution digitizer are summarized. Performance data is presented for selected applications, by David A. Czenkusch, pg 39-49

Time Interpolation, by David E. Smith, pg 42-43

Measurement of Capacitor Dissipation Factor using Digitizing, by Ronald L. Swerlein, pg 46-47

A Structural Approach to Software Defect Analysis. An effective software defect analysis requires that the relationships between program faults, human errors, and flaws in the design process be understood and characterized before corrective measures can be implemented, by Takeshi Nakajo, Katsuhiko Sasabuchi, Tadashi Akiyama, pg 50-56

Corrections: Two corrections for the article “Phase Digitizing: A New Method for Capturing and Analyzing Spread-Spectrum Signals”, page 28 in the February 1989 issue; also a correction to figures on page 7 and page 9 in “Characterization of Time Varying Frequency Behavior Using Continuous Measurement Technology”, page 6 in the same issue, pg 56

Dissecting Software Failures. Beyond collecting software defect data just to study defect frequency, this paper outlines a quality data collection process, an effective analysis process, and a method to justify changes in the software development process based on the defect analysis, by Robert B. Grady, pg 57-63

Defect Origins and Types, pg 62

Software Defect Prevention Using McCabe’s Complexity Metric. HP’s Waltham Division has started to use this methodology and its associated tools to catch defect prone software modules early and to assist in the testing process, by William T. Ward, pg 64-69. See Also: Correction: Corrected figure from page 66 in the June 1989 issue, page 78

The Cyclomatic Complexity Metric, by Thomas J. McCabe, pg 66-67

Object-Oriented Unit Testing. HP’s Waltham Division has taken a first step in applying new and traditional unit testing concepts to a software product implemented in an object-oriented language, by Steven P. Fiedler, pg 69-74

Validation and Further Application of Software Reliability Growth Models. After two years of use, a software reliability growth model has been validated with empirical data, and now it is being expanded to estimate test duration before it begins, by Gregory A. Kruger, pg 75-79. Lake Stevens Instrument Division.

See Also: Correction: Replacement for the equation on page 75 in the article “Validation and Further Application of Software Reliability Growth Models”, page 31 in the August 1989 issue

Comparing Structured and Unstructured Methodologies in Firmware Development. Structured methodologies have been promoted as a solution to software productivity and quality problems. At HP’s Logic Systems Division one project used both structured and unstructured techniques, and collected metrics and documented observations for comparing the two methodologies, by William A. Fischer, Jr., James W. Jost, pg 80-85

An Object-Oriented Methodology for Systems Analysis and Specification. A methodology is proposed that enables analysts to model and specify a system’s data, interactions, processing and external behavior before design, by Donna Ho, Teresa A. Wall, Barry D. Kurtz, pg 86-90

VXIbus: A New Interconnection Standard for Modular Instruments. This standard will allow users to mix modules from different manufactures in a system contained in a single mainframe, by Kenneth Jessen, pg 91-95

VXIbus Product Development Tools. A VXIbus mainframe, a pair of modules, software, and accessories will help manufacturers develop VXIbus modules and systems more easily, by Kenneth Jessen, pg 96-97

Authors April 1989: Scott D. Stever, Wayne C. Goeke, Stephen [Steve] B. Venzke, Ronald [Ron] L. Swerlein, Gary A. Ceely, David J. Rustici, David [Dave] A. Czenkusch, Takeshi Nakajo, Katsuhiko Sasabuchi, Tadashi Akiyama, Robert [Bob} B. Grady, William [Jack] T. Ward, Steven [Steve] P. Fiedler, Gregory [Greg] A. Kruger, William [Bill] A. Fischer, Jr., James [Jim] W. Jost, Barry D. Kurtz, Teresa A. Wall, Donna Ho, Kenneth [Ken] Jessen, pg 98-100

June 1989 v.40 n.3

Cover: A veterinary bolus assembly line at the ALZA Corporation in Palo Alto, California; ALZA Directory of Quality Assurance Carol L. Hartstein with a simulated monitor screen

A Data Base for Real-Time Applications and Environments. HP Real-Time Data Base is a set of subroutines and a query facility that enable real-time application developers to build and access a real-time, high-performance, memory-resident data management system. The software runs in an HP-UX environment on an HP 9000 Series 300 or 800 Computer, by Cynthia Givens, Michael J. Wright, Le T. Hong, Michael R. Light, Feyzi Fatehi, Ching-Chao Liu, pg 6-17

New Midrange Members of the Hewlett-Packard Precision Architecture Computer Family. Higher performance comes from faster VLSI parts, bigger cache and TLB subsystems, a new floating-point coprocessor, and other enhancements. A new 16M-byte memory board is made possible by a double-sided surface mount manufacturing process, by John Keller, Thomas O. Meyer, Floyd E. Moore, Jeffrey G. Hargis, Russell C. Brockmann, pg 18-25. HP 9000 Model 835, HP 3000 Series 935.

Double-sided Surface Mount Process, by Andy Vogen, pg 23-24

Data Compression in a Half-Inch Reel-to-Reel Tape Drive. A proprietary data compression algorithm implemented in a custom CMOS VLSI chip improves the throughput and data capacity of the HP 7980XC Tape Drive, by David J. Van Maren, Mark J. Bianchi, Jeffery J. Kato, pg 26-31

Maximizing Tape Capacity by Super-Blocking. Interrecord gaps on the tape limit the capacity improvement attainable with data compression in the HP 7980XC Tape Drive. Super-blocking eliminates most of these gaps, by Jeffery J. Kato, Mark J. Bianchi, David J. Van Maren, pg 32-34

High-Speed Lightwave Component Analysis. A new analyzer system performs stimulus-response testing of electrical-to-optical, optical-to-electrical, optical-to-optical, and electrical-to-electrical components of high-speed fiber optic communications systems, by Roger W. Wong, Paul Hernday, Michael G. Hart, Geraldine A. Conrad, pg 35-51. 8702A.

OTDR versus OFDR, pg 43

Design and Operation of High-Frequency Lightwave Sources and Receivers. These compact, rugged modules are essential components of HP 8702A Lightwave Component Analyzer Systems, by Kent W. Leyde, Kenneth W. Shaughnessy, Rollin F. Rawson, Robert D. Albin, pg 52-57

High-Speed PIN Infrared Photodetectors for HP Lightwave Receivers, by Susan Sloan, pg 56

Videoscope: A Nonintrusive Test Tool for Personal Computers. The Videoscope system uses signature analysis techniques developed for digital troubleshooting to provide a tool that allows a tester to create an automated test suite for doing performance, compatibility, and regression testing of applications running on HP Vectra Personal Computers, by Danny Low, Myron R. Tuttle, pg 58- 64

Video Signature Analyzer Operation, pg 62-63

Authors June 1989: Michael [Mike] R. Light, Michael  [Mike] J. Wright, Le T. Hong, Cynthia Givens, Feyzi Fatehi, Ching-Chao Liu, Thomas [Tom] O. Meyer, Jeffrey [Jeff] G. Hargis, John Keller, Floyd E. Moore, Russell [Russ] C. Brockmann, Jeffery [Jeff] J. Kato, Mark J. Bianchi, David [Dave] J. Van Maren, Michael [Mike] G. Hart, Paul Hernday, Geraldine [Gerry] A. Conrad, Roger W. Wong, Kenneth [Ken] W. Shaughnessy, Kent W. Leyde, Rollin [Fred] F. Rawson, Robert [Dale] D. Albin, Myron R. Tuttle, Danny Low, J. Barry Shackleford, Vladimir Naroditsky, Wulf D. Rehder, Paul J. Marcoux, Paul P. Merchant, pg 65-68

Neural Data Structures: Programming with Neurons. Networks of neurons can quickly find good solutions to many optimization problems. Looking at such problems in terms of certain neural data structures makes programming neural networks natural and intuitive, by J. Barry Shackleford, pg 69-78. John J. Hopfield.

Correction: A replacement for figure 1 on page 66 in the article “The Cyclomatic Complexity Metric”, in the April 1989 issue, pg 78

A New 2D Simulation Model of Electromigration. Electromigration in miniature IC interconnect lines is simulated in HP’s sophisticated two-dimensional model, giving new quantitative and graphical insights into one of the most important metallization failure sources for VLSI chips, by Paul P. Merchant, Vladimir Naroditsky, Wulf D. Rehder, Paul J. Marcoux, pg 79-84

August 1989 v.40 n.4

Cover: The cover shows the displays that would appear when a NewWave Office user opens a file drawer, selects a folder, and chooses a document to edit

An Overview of the HP NewWave Environment The NewWave environment allows users to concentrate on the task and not the computer system. For developers of new applications, it provides the facilities to integrate applications into the NewWave environment, by Ian J. Fuller, pg 6-8

An Object-Based User Interface for the HP NewWave Environment. The NewWave environment is designed to allow users to focus on their tasks and not the tools. To accomplish this, the NewWave environment presents users with a conceptual model based on an office metaphor that is built on an object-based architecture, by Peter S. Showman, pg 9-17

The NewWave Object Management Facility. An object-based file system is the foundation of the New Wave environment. This paper describes the concepts and features of the system, by John A. Dysart, pg 17-22

The NewWave Office. The NewWave Office is the user interface for the NewWave environment. It provides the tools and methods to perform tasks found in a regular office environment, by Beatrice Lam, Scott A. Hanson, Anthony J. Day, pg 23-31

Trademark Acknowledgments for this Issue, pg 31

Correction: Replacement for the equation on page 75 in the article “Validation and Further Application of Software Reliability Growth Models”, in the April 1989 issue, pg 31

Agents and the HP NewWave Application Program Interface. In the NewWave environment, an agent is a software robot that acts as a personal assistant for the user. The agent interacts with the applications through the application program interface, by Glenn R. Stearns, pg 32-37

AI Principles in the Design of the NewWave Agent and API, pg 35

An Extensible Agent Task Language. With this language, users of the HP NewWave environment can create scripts to direct their NewWave agent to perform tasks for them. The language is designed for both novice and knowledgeable users, by Barbara B. Packard, Charles H. Whelan, pg 38-42

A NewWave Task Language Example, pg 40

The HP NewWave Environment Help Facility. The NewWave environment provides a common, context sensitive, intuitive, unobtrusive help facility for NewWave applications, by Vicky Spilman, Eugene J. Wong, pg 43-47

NewWave Computer-Based Training Development Facility. Computer-based training in the NewWave environment allows users to learn how to use the system at their own pace, and provides facilities for users to create their own computer-based training courseware, by R. Thomas Watson, Brian B. Egan, John J. Jencek, Lawrence A. Lynch-Freshner, pg 48-56

Encapsulation of Applications in the NewWave Environment. To allow non-NewWave applications to run in the NewWave environment, the NewWave encapsulation facilities provide features for the partial or full integration of these applications into the NewWave environment, by William M. Crow, pg 57-64

[Authors:] Ian J. Fuller, Peter [Pete] S. Showman, John [Andy] A. Dysart, Scott A. Hanson, Anthony [Tony] J. Day, Beatrice [Bea] Lam, Glenn R. Stearns, Charles [Chuck] H. Whelan, Barbara B. Packard, Vicky Spilman, Eugene J. Wong, Lawrence [Larry] A. Lynch-Freshner, R. [Tom] Thomas Watson, John J. Jencek, Brian B. Egan, William [Bill] M. Crow, Andrew [Andy] D. Topham, David [Dave] Gills, Tracey A. Hains, Mark J. Simms, Paul F. Bartlett, Paul F. Robinson, Thomas [Tom] F. Kraemer, pg 64-66

Mechanical Design of a New Quarter-Inch Cartridge Tape Drive. The design of the HP9145A Tape Drive required doubling both the track density and the tape speed of the existing HP 9144A, thereby doubling the older drive’s 67-Mbyte capacity and 2-Mbyte-per-minute transfer rate, by Andrew D. Topham, pg 67-73

Reliability Assessment of a Quarter-Inch Cartridge Tape Drive. Aggressive quality standards were verified by over 97,000 test hours before manufacturing release and are audited continually in production, by David Gills, pg 74-78. 9145A.

Use of Structured Methods for Real-Time Peripheral Firmware. HP’s Computer Peripherals Bristol Division made some significant changes in their firmware development process to ensure that they met a demanding development schedule and still produced a quality product, by Tracey A. Hains, Paul F. Bartlett, Mark J. Simms, Paul F. Robinson, pg 79-86

Product Development Using Object-Oriented Software Technology. Object-oriented technology is rapidly becoming an accepted technology for designing and developing software systems. This paper provides a brief history, a tutorial, and a description of HP’s Lake Stevens Instrument Division’s experience using the technology for product development, by Thomas F. Kraemer, pg 87-100.

See Also: Correction: Replacement for the equation on page 75 in the article “Validation and Further Application of Software Reliability Growth Models”, page 31 in the October 1989 issue

Objective-C Coding Example, pg 95

Object-Oriented Life Cycles, pg 98

October 1989 v.40 n.5

Cover: The fractional-N module from HP’s Performance Signal Generator family

40 Years of Chronicling Technical Achievement. Over the last 40 years the HP Journal has created a record of HP’s technical achievements by communicating technical information to professional people in all fields served by HP. With Hewlett-Packard celebrating its 50th anniversary it seems appropriate to take a look at the HP Journal, past and present, and some of the technological history of HP it has chronicled, by Charles L. Leath, pg 6-13

A Modular Family of High-Performance Signal Generators. Three signal generators, each designed for a particular type of application and each offering several options, let the user choose and pay for exactly the capability required, by Michael D. McNamee, David L. Platt, pg 14-20. 8644A, 8645A, 8665A.

Firmware Development for Modular Instrumentation. Of three major subsystems in the Performance Signal Generator control firmware, only one contains instrument-specific code. Additional hardware and firmware for calibration and diagnostic purposes provide important customer and production benefits, by Kerwin D. Kanago, Brian D. Watkins, Mark A. Stambaugh, pg 20-26. PSG.

RF Signal Generator Single-Loop Frequency Synthesis, Phase Noise Reduction, and Frequency Modulation. This signal generator design uses only a single phase-locked loop for frequency synthesis and one or more frequency-locked loops for phase noise reduction. The frequency-locked loops are based on delay line discriminators. Frequency modulation is introduced into all loops, by Earl C. Herleikson, Brad E. Andersen, pg 27-33. PSG, 8644A, 8645A, 8665A.

Fractional-N Synthesis Module, by Barton L. McJunkin, pg 28

Delay Line Discriminators and Frequency-Locked Loops, by Earl C. Herleikson, pg 30-31

Design Considerations in a Fast Hopping Voltage-Controlled Oscillator. The fast hopping requirement affected the design of the discriminator power amplifier, phase shifter, and delay line, the wideband feedback loop, and the VCO pretune circuit by Barton L. McJunkin, David M. Hoover, pg 34-36. 8645A.

High-Spectral-Purity Frequency Synthesis in a Microwave Signal Generator. A low-noise YIG-tuned fundamental oscillator and a GaAs divider contribute to the spectral purity of the HP 8665A 4.2-GHz Synthesized Signal Generator, by Douglas R. Snook, James B. Summers, pg 37-41

Microwave Signal Generator Output System Design. Noise performance and level accuracy were major design concerns. Thick-film microcircuits, some “packageless” are used extensively, by Steve R. Fried, Keith L. Fries, John M. Sims, pg 42-50. 8665A.

“Packageless” Microcircuits, by Bennie E. Helmso, pg 44

Design of a High-Performance Pulse Modulation System. The pulse modulation option for the HP 8665A Synthesized Signal Generator adds a pulse modulator and an internal pulse generator. The pulse modulator uses gallium arsenide field-effect transistor switches on microwave monolithic integrated circuits, by Douglas R. Snook, G. Stephen Curtis, pg 51-59. 8665A.

Reducing Radiated Emissions in the Performance Signal Generator Family. Two levels of radiated emissions are offered: one standard and one optional. The optional level, – 133 dBm into a two-turn loop one inch away from any surface, is 26 dB lower than the standard specification, by Donald T. Borowski, Larry R. Wright, pg 59-65

Authors October 1989: Michael [Mike] D. McNamee, David [Dave] L. Platt, Brian D. Watkins, Kerwin D. Kanago, Mark A. Stambaugh, Earl C. Herleikson, Brad E. Andersen, Barton [Bart] L. McJunkin, David [Dave] M. Hoover, Douglas [Doug] R. Snook, James [Jim] B. Summers, Steve R. Fried, Keith L. Fries, John M. Sims, G. Stephen [Steve] Curtis, Larry R. Wright, Donald [Don] T. Borowski, Susan R. Sloan, Eve M. Tanner, Catherine [Cathy] A. Keely, Anastasia [Stacy] M. Martelli, Lucy M. Berlin, Carolyn F. Jones, pg 66-68

Processing and Passivation Techniques for Fabrication of High-Speed InP/InGaAs/InP Mesa Photodetectors. Proper surface preparation and a conformal mesa passivation covering are critical to the production of low-dark-current photodiodes. The best results have been obtained with a wet chemical etch followed by double-layer polyimide passivation, by Susan R. Sloan, pg 69-75

Providing Programmers with a Driver Debug Technique. Symbolic debugging is difficult for programmers who are developing drivers to run under the HP-UX operating system but do not have HP-UX source licenses. A technique is described to use available compiler information to provide access to certain HP-UX debug records, by Eve M. Tanner, pg 76-80

HP-UX Object Module Structure, pg 78

Identifying Useful HP-UX Debug Records, pg 79

Solder Joint Inspection Using Laser Doppler Vibrometry. Good solder joints can be distinguished from bad joints by their vibration spectra. Vibration frequencies for bad joints are consistent for a given lead type, by Catherine A. Keely, pg 81-85

Laser Doppler Vibrometry, pg 82-83

Correction: Replacement for the equation on page 75 in the article “Validation and Further Application of Software Reliability Growth Models”, in the April 1989 issue, pg 31

A Model for HP-UX Shared Libraries Using Shared Memory on HP Precision Architecture Computers. To meet the needs of the PORT/HP-UX product, a special model for shared libraries was developed and implemented on HP 9000 Series 800 Computers, by Anastasia M. Martelli, pg 86-90. PORT/RX.

User-Centered Application Definition: A Methodology and Case Study. This paper presents a practical user-centered methodology for application definition. The methodology encompasses interviewing strategies, task analysis, and storyboarding techniques. The need for systematic user analysis is demonstrated, and the methodology is illustrated by a case study, by Lucy M. Berlin, pg 90-97

Interviewing Techniques, pg 92

Storyboarding Techniques, by Cathy Fletcher, pg 95-96

Partially Reflective Light Guides for Optoelectronics Applications. The guides control the light from an array of light-emitting diodes in a high-performance, low-cost erase bar for electrophotographic copiers, by Carolyn F. Jones, pg 98-104.

See Also: Correction: Words were transposed in the equations and text on page 99 in the article “Partially Reflective Light Guides for Optoelectronics Applications”; also other corrections to the same figures, page 57 in the December 1989 issue

December 1989 v.40 n.6

Cover: The HP 9000 Series 300 display shows the results obtainable using a Starbase/X11 Merge system display mode called combined mode

System Design for Compatibility of a High-Performance Graphics Library and the X Window System. The Starbase/X11 Merge system provides an architecture that enables Starbase applications and X Window System applications to coexist in the same window environment, by Kenneth H. Bronstein, David J. Sweetser, William R. Yoder, pg 6-12

The Starbase Graphics Package, pg 7

The X Window System, pg 8

Starbase/X11 Merge Glossary, pg 11-12

Managing and Sharing Display Objects in the Starbase/X11 Merge System. To allow Starbase and X to share graphics resources, a special process called the graphics resource manager was created to manage access to the shared resources. An object-oriented approach was taken to encapsulate these shared graphics resources, by Courtney Loomis, Robert C. Cline, James R. Andreas, pg 12-19

Sharing Access to Display Resources in the Starbase/X11 Merge System. The Starbase/X11 Merge system provides features to allow Starbase applications direct access to the display hardware at the same time X server clients are running. There are also capabilities to allow sharing of cursors and the hardware color map, by Jens R. Owen, Steven P. Hiebert, Jeff R. Boyton, Sankar L. Chakrabarti, Keith A. Marchington, John A. Waitz, Peter R. Robinson, John J. Lang, Michael H. Stroyan, pg 20-32

Sharing Overlay and Image Planes in the Starbase/X11 Merge System. Developing a method to take full advantage of the capabilities of display memory was one of the challenges of the Starbase/X11 Merge products, by John J. Lang, Keith A. Marchington, Steven P. Hiebert, pg 33-38

Sharing Input Devices in the Starbase/X11 Merge System. To provide support for the full set of HP input devices and to provide access to these devices for Starbase applications running in the X environment, extensions were added to the X core input devices: the keyboard and the pointer, by Ian A. Elliot, George M. Sachs, pg 38-41

X Input Protocol and X Input Extensions, pg 39

Sharing Testing Responsibilities in the Starbase/X11 Merge System. The testing process for the Starbase/X11 Merge software involved setting realizable quality goals, and using extensive test suites and test tools to measure and automate the process, by John M. Brown, Thomas J. Gilg, pg 42-46

Authors December 1989: David J. Sweetser, Kenneth [Ken] H. Bronstein, William [Bill] R. Yoder, Robert [Bob] C. Cline, James [Jim] R. Andreas, Courtney Loomis, Michale [Mike] H. Stroyan, John J. Lang, Jeff R. Boyton, Sankar L. Chakrabarti, Jens R. Owen, John A. Waitz, Peter R. Robinson, Keith A. Marchington, Steven [Steve] P. Hiebert, George M. Sachs, Ian A. Elliott, John M. Brown, Thomas J. Gilg, B. David Cathell, Michael [Mike] B. Kaistein, Stephen [Steve] J. Pearce, Rainer Plitschka, Larry J. Thayer, David [Dave] A. Burgoon,  pg 47-49

A Compiled Source Access System Using CD-ROM and Personal Computers. HP Source Reader is in use in virtually every HP support facility around the world, giving local support engineers fast access to complete source code listings for MPE, the HP 3000 Computer operating system, by Stephen J. Pearce, Michael B. Kalstein, B. David Cathell, pg 50-57

Correction: Words were transposed in the equations and text on page 99 in the article “Partially Reflective Light Guides for Optoelectronics Applications”, in the October 1989 issue; also other corrections to the same figures, pg 57

Transmission Line Effects in Testing High-Speed Devices with a High-Performance Test System. The testing of high-speed, high-pin-count ICs that are not designed to drive transmission lines can be a problem, since the tester-to-device interconnection almost always acts like a transmission line. The HP 82000 IC Evaluation System uses a resistive divider technique to test CMOS and other high-speed devices accurately, by Rainer Plitschka, pg 58-67

CMOS Device Measurement Results, pg 65

Index: Volume 40 January 1989 through December 1989. PART 1: Chronological Index, pg 67-68. PART 2: Subject Index, pg 69-72. PART 3: Product Index, pg 72. PART 4: Author Index, pg 72-73.

Custom VLSI in the 3D Graphics Pipeline. VLSI transform engine, z-cache, and pixel processor chips widen bottlenecks in the pipeline to allow the HP9000 Series 300 and 800 TurboSRX graphics subsystem to deliver enhanced performance compared to the earlier SRX design, by Larry J. Thayer, pg 74-77

Global Illumination Modeling Using Radiosity. Radiosity is a complementary method to ray tracing for global illumination modeling. HP 9000 TurboSRX graphics workstations now offer three illumination models: radiosity, ray tracing and a local illumination model, by David A. Burgoon, pg 78-88